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path: root/llvm/lib/Target/X86/X86TargetMachine.cpp
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* - Switch X86-64 JIT to large code size model.Evan Cheng2006-12-051-0/+3
* Non-darwin gcc should default to static relocation to match gcc.Evan Cheng2006-12-041-1/+1
* Removed even more std::cerr and #include <iostream> things.Bill Wendling2006-11-171-1/+0
* Committing X86-64 support.Evan Cheng2006-09-081-7/+53
* 1. Remove condition on delete.Jim Laskey2006-09-071-0/+5
* Fix some X86 JIT failures. This should really come from TargetJITInfo.Chris Lattner2006-09-041-0/+3
* Completely rearchitect the interface between targets and the pass manager.Chris Lattner2006-09-041-110/+22
* Simplify target construction.Chris Lattner2006-09-031-3/+1
* - Enable x86 isel preprocessing by default unless -fast is specified.Evan Cheng2006-08-291-2/+2
* Initial checkin of the Mach-O emitter. There's plenty of fixmes, but itNate Begeman2006-08-231-1/+1
* Disable LSR at -fastNate Begeman2006-08-021-1/+1
* Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.Chris Lattner2006-07-261-1/+1
* - Refactor the code that resolve basic block references to a TargetJITInfoEvan Cheng2006-07-251-1/+1
* Don't pass target name into TargetData anymore, it is never used or needed.Chris Lattner2006-06-161-1/+1
* Fix a build breaker.Evan Cheng2006-05-301-2/+2
* Make TargetData strings less redundant.Owen Anderson2006-05-201-1/+1
* Make all of the TargetMachine subclasses use the new string TargetData methods.Owen Anderson2006-05-201-1/+1
* Refactor TargetMachine, pushing handling of TargetData into the target-specif...Owen Anderson2006-05-031-1/+2
* Disable switch lowering for targets based on the selection dag isel,Nate Begeman2006-04-081-10/+0
* SelectionDAGISel can now natively handle Switch instructions, in the sameNate Begeman2006-03-271-4/+7
* Eliminate IntrinsicLowering from TargetMachine.Chris Lattner2006-03-231-5/+2
* Turning on LSR by defaultEvan Cheng2006-03-191-6/+2
* Added a way for TargetLowering to specify what values can be used as theEvan Cheng2006-03-161-2/+2
* Added getTargetLowering() to TargetMachine. Refactored targets to support this.Evan Cheng2006-03-131-2/+6
* Add option -enable-x86-lsr to enable x86 loop strength reduction pass.Evan Cheng2006-03-091-0/+7
* - Added option -relocation-model to set relocation model. Valid values includ...Evan Cheng2006-02-221-2/+7
* Disable PIC for JIT.Evan Cheng2006-02-181-0/+3
* Kill the x86 pattern isel. boom.Nate Begeman2006-02-171-15/+2
* remove an old commentChris Lattner2006-02-031-3/+2
* Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is nowChris Lattner2006-02-031-4/+0
* Bye bye Pattern ISel, hello DAG ISel.Evan Cheng2006-01-271-10/+10
* x86 CPU detection and proper subtarget supportEvan Cheng2006-01-271-36/+1
* Added preliminary x86 subtarget support.Evan Cheng2006-01-261-2/+12
* Add explicit #includes of <iostream>Chris Lattner2006-01-221-0/+1
* Stop doing that accidental commit.Evan Cheng2006-01-201-1/+1
* A few more SH{L|R}D peepholes.Evan Cheng2006-01-201-1/+1
* Didn't mean to commit the last one.Evan Cheng2006-01-191-1/+1
* Added i16 SH{L|R}D patterns.Evan Cheng2006-01-191-1/+1
* SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.Evan Cheng2005-12-201-0/+3
* Only lower SELECT when using DAG based isel.Evan Cheng2005-12-171-4/+7
* remove some never-completed and now-obsolete code.Chris Lattner2005-12-121-11/+0
* initial step at adding a dag-to-dag isel for X86 backend. Patch contributedChris Lattner2005-11-161-2/+11
* Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. PatchChris Lattner2005-11-151-2/+2
* Add a new option to indicate we want the code generator to emit code quickly,...Chris Lattner2005-11-081-1/+2
* 1. Use SubtargetFeatures in llc/lli.Jim Laskey2005-09-011-2/+4
* Remove the X86 and PowerPC Simple instruction selectors; their time hasNate Begeman2005-08-181-10/+4
* Eliminate all remaining tabs and trailing spaces.Jeff Cohen2005-07-271-1/+1
* Implement Subtarget supportNate Begeman2005-07-121-1/+3
* Refactor things a bit to allow the ELF code emitter to run the X86 machine co...Chris Lattner2005-07-111-1/+8
* First round of support for doing scalar FP using the SSE2 ISA extension andNate Begeman2005-07-061-2/+7
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