| Commit message (Collapse) | Author | Age | Files | Lines |
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code emitter
after itself.
llvm-svn: 22376
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XMM registers. There are many known deficiencies and fixmes, which will be
addressed ASAP. The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.
The x86 backend will still default to x87 style FP. To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.
An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
Sum += P[i]; return Sum; }
The inner loop looks like the following:
x87:
.LBB_foo_1: # no_exit
fldl (%esp)
faddl (%eax,%ecx,8)
fstpl (%esp)
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
SSE2:
addsd (%eax,%ecx,8), %xmm0
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
llvm-svn: 22340
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currently use: llc t.bc --filetype=obj
This will produce a t.o file which is dumpable with readelf. Currently
the file produced is empty, but the scaffolding to do more is now in place.
llvm-svn: 22292
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interface.
llvm-svn: 22282
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llvm-svn: 21898
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* Convert tabs to spaces
llvm-svn: 21426
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Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
0 == off
1 == on
2 == target default
llvm-svn: 21309
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For now, this is the default, as the current selector is missing some big pieces.
To enable the new selector, pass -disable-pattern-isel=false to llc or lli.
llvm-svn: 19335
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llvm-svn: 19273
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to get Visual Studio to link in X86.lib to the executables that need it. There
is another way of doing it.
llvm-svn: 19252
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llvm-svn: 18830
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llvm-svn: 17431
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llvm-svn: 17406
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llvm-svn: 17126
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the -sse* options (to avoid misleading people).
Also, the stack alignment of the target doesn't depend on whether SSE is
eventually implemented, so remove a comment.
llvm-svn: 16860
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Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
llvm-svn: 16137
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llvm-svn: 16018
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llvm-svn: 15787
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llvm-svn: 15380
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again in the future, it can be resurrected out of CVS
llvm-svn: 15112
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The shared command line options are now in a header that makes sense.
llvm-svn: 14756
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llvm-svn: 14747
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llvm-svn: 14745
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llvm-svn: 14564
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If not,
this is a bug, and should be fixed.
llvm-svn: 14476
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llvm-svn: 14266
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llvm-svn: 14110
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llvm-svn: 13696
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llvm-svn: 12714
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llvm-svn: 12578
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support
folding compares into the select yet.
llvm-svn: 12553
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llvm-svn: 12541
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llvm-svn: 12122
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where there did not used to be any before
llvm-svn: 11829
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that will be responsible for the creation of MachineFunctions and will
be required by all MachineFunctionPass passes.
llvm-svn: 11453
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ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
llvm-svn: 11340
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llvm-svn: 11218
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at Chris's request.
llvm-svn: 11120
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implementation from the TargetMachine directly.
llvm-svn: 10636
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llvm-svn: 10629
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instruction selector by adding a new pseudo-instruction
FP_REG_KILL. This instruction implicitly defines all x86 fp registers
and is a terminator so that passes which add machine code at the end
of basic blocks (like phi elimination) do not add instructions between
it and the branch or return instruction.
llvm-svn: 10562
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been emitted. Also, since the FPK pass is causing memory access violations,
disable it.
llvm-svn: 10559
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llvm-svn: 10542
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allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.
llvm-svn: 10446
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Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code. Each of these is a fairly substantial job, so this will remain disabled
for the immediate future. :(
llvm-svn: 10276
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llvm-svn: 9903
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llvm-svn: 9758
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Header files will be on the way.
llvm-svn: 9298
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llvm-svn: 9288
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llvm-svn: 9281
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