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| author | Chris Lattner <sabre@nondot.org> | 2003-12-01 05:18:30 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2003-12-01 05:18:30 +0000 |
| commit | 6d760d7cb38a467b1555a1d3ae3ab19309a68726 (patch) | |
| tree | 450a916de9002131d3fc0f9029809842172bfbec /llvm/lib/Target/X86/X86TargetMachine.cpp | |
| parent | a9137233091a2d0057312b3c2c69ba98e0294c6a (diff) | |
| download | bcm5719-llvm-6d760d7cb38a467b1555a1d3ae3ab19309a68726.tar.gz bcm5719-llvm-6d760d7cb38a467b1555a1d3ae3ab19309a68726.zip | |
Add an option to enable the SSA based peephole optimizer.
Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code. Each of these is a fairly substantial job, so this will remain disabled
for the immediate future. :(
llvm-svn: 10276
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86TargetMachine.cpp | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index 31eb4bd61c2..eb4d19a7783 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -29,6 +29,8 @@ namespace { cl::desc("Print generated machine code")); cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true), cl::desc("Use the 'simple' X86 instruction selector")); + cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true), + cl::desc("Disable the ssa-based peephole optimizer (defaults to disabled)")); } // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine @@ -66,9 +68,9 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM, else PM.add(createX86PatternInstructionSelector(*this)); - // TODO: optional optimizations go here - - // FIXME: Add SSA based peephole optimizer here. + // Run optional SSA-based machine code optimizations next... + if (!NoSSAPeephole) + PM.add(createX86SSAPeepholeOptimizerPass()); // Print the instruction selected machine code... if (PrintCode) @@ -117,7 +119,9 @@ bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) { else PM.add(createX86PatternInstructionSelector(*this)); - // TODO: optional optimizations go here + // Run optional SSA-based machine code optimizations next... + if (!NoSSAPeephole) + PM.add(createX86SSAPeepholeOptimizerPass()); // FIXME: Add SSA based peephole optimizer here. |
