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path: root/llvm/lib/Target/X86/X86RegisterInfo.cpp
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* [MCRegInfo] Add forward sub and super register iterators. (NFC)Florian Hahn2019-12-051-12/+8
* Set the floating point status register as reservedPengfei Wang2019-11-031-0/+3
* [X86] Model MXCSR for all SSE instructionsCraig Topper2019-10-301-0/+3
* Add Windows Control Flow Guard checks (/guard:cf).Andrew Paverd2019-10-281-0/+8
* [WinEH] Allocate space in funclets stack to save XMM CSRsPengfei Wang2019-08-271-1/+18
* [X86] Use Register/MCRegister in more places in X86Craig Topper2019-08-161-2/+2
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-4/+4
* CodeGen: Introduce a class for registersMatt Arsenault2019-06-241-1/+1
* Recommit r358887 "[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits ...Craig Topper2019-05-131-0/+15
* [X86] Limit the 'x' inline assembly constraint to zmm0-15 when used for a 512...Craig Topper2019-04-151-0/+1
* Fix the lowering issue of intrinsics llvm.localaddress on X86Craig Topper2019-02-081-0/+9
* [X86] Add FPCW as a register and start using it as an implicit use on floatin...Craig Topper2019-02-081-0/+3
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [X86] Add phony registers for high halves of regs with low halvesKrzysztof Parzyszek2018-07-021-1/+6
* Separate ExecutionDepsFix into 4 parts:Marina Yatsina2018-01-221-1/+1
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-11/+11
* Remove redundant includes from lib/Target/X86.Michael Zolotukhin2017-12-131-5/+0
* Control-Flow Enforcement Technology - Shadow Stack support (LLVM side)Oren Ben Simhon2017-11-261-0/+3
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-2/+2
* Move TargetFrameLowering.h to CodeGen where it's implementedDavid Blaikie2017-11-031-1/+1
* X86: remove R12 from CSR on Windows x64 SwiftCCSaleem Abdulrasool2017-09-251-20/+19
* [AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as wellMartin Storsjo2017-07-171-3/+3
* Strip trailing whitespace. NFCI.Simon Pilgrim2017-05-121-7/+7
* [X86] Support of no_caller_saved_registers attributeOren Ben Simhon2017-05-031-1/+8
* Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-5/+9
* X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFCMatthias Braun2017-04-241-26/+13
* Revert "X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFC"Matthias Braun2017-04-211-12/+26
* X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFCMatthias Braun2017-04-201-27/+12
* X86RegisterInfo: eliminateFrameIndex: Force SP for AfterFPPop; NFCMatthias Braun2017-04-201-3/+4
* ExecutionDepsFix: Normalize names; NFCMatthias Braun2017-03-181-1/+1
* x86 interrupt calling convention: only save xmm registers if the target suppo...Andrea Di Biagio2017-02-161-2/+6
* Move most EH from MachineModuleInfo to MachineFunctionMatthias Braun2016-12-011-1/+1
* Temporarily Revert "Move most EH from MachineModuleInfo to MachineFunction"Eric Christopher2016-12-011-1/+1
* Move most EH from MachineModuleInfo to MachineFunctionMatthias Braun2016-11-301-1/+1
* Clarify rules for reserved regs, fix aarch64 ones.Matthias Braun2016-11-301-0/+2
* X86: Move a non-null assert to before the pointer is dereferencedJustin Bogner2016-11-031-1/+2
* [X86] Basic additions to support RegCall Calling Convention.Oren Ben Simhon2016-10-131-0/+26
* [AVX-512] Fix a bug in getLargestLegalSuperClass where we inflated to VR128X/...Craig Topper2016-10-081-10/+9
* [X86] Preserve BasePtr for LEA64_32rMichael Kuperstein2016-10-061-3/+5
* [X86] Don't preserve Win64 SSE CSRs when SSE is disabledReid Kleckner2016-09-301-1/+6
* [X86] Optimization for replacing LEA with MOV at frame index elimination timeZvi Rackover2016-09-261-1/+31
* [AVX-512] Replace get512BitSuperRegister with calls to TargetRegisterInfo::ge...Craig Topper2016-09-251-10/+0
* [AVX-512] Teach X86InstrInfo::copyPhysReg to use a 512-bit move if XMM16-XMM3...Craig Topper2016-09-201-0/+10
* [AVX-512] Simplify X86InstrInfo::copyPhysReg for 128/256-bit vectors with AVX...Craig Topper2016-09-051-10/+0
* Replace "fallthrough" comments with LLVM_FALLTHROUGHJustin Bogner2016-08-171-2/+3
* [AVX-512] Teach X86InstrInfo::getLargestLegalSuperClass to inflate to FR32X/F...Craig Topper2016-08-011-4/+26
* [AVX512] Add X86::VR512RegClassID to X86RegisterInfo::getLargestLegalSuperClass.Craig Topper2016-07-311-0/+1
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-6/+6
* Fixed the callee saved registers list for X86 AllRegs calling convention.Amjad Aboud2016-05-121-8/+13
* [X86] Add ZMM registers to the X86_INTR calling convention preserved mask whe...Craig Topper2016-05-101-0/+2
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