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* Reapply r106896:Bruno Cardoso Lopes2010-06-251-9/+16
| | | | | | | Add several AVX MOV flavors Support VEX encoding for MRMDestReg llvm-svn: 106912
* revert this now, it's using avx instead of sse :)Bruno Cardoso Lopes2010-06-251-16/+9
| | | | llvm-svn: 106906
* Add several AVX MOV flavorsBruno Cardoso Lopes2010-06-251-9/+16
| | | | | | Support VEX encoding for MRMDestReg llvm-svn: 106896
* - Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}.Bruno Cardoso Lopes2010-06-241-13/+20
| | | | | | | - Fix a small VEX encoding issue. - Move compare instructions to their appropriate place. llvm-svn: 106787
* Add AVX MOV{SS,SD}{rr,rm} instructionsBruno Cardoso Lopes2010-06-221-6/+12
| | | | llvm-svn: 106588
* rip out dead code.Chris Lattner2010-06-191-6/+0
| | | | llvm-svn: 106365
* fix rdar://7873482 by teaching the instruction encoder to emitChris Lattner2010-06-191-9/+43
| | | | | | segment prefixes. Daniel wrote most of this patch. llvm-svn: 106364
* More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rrBruno Cardoso Lopes2010-06-121-1/+5
| | | | | | Handle OpSize TSFlag for AVX llvm-svn: 105869
* Add some comments about REX fieldsBruno Cardoso Lopes2010-06-121-10/+10
| | | | llvm-svn: 105860
* More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm)Bruno Cardoso Lopes2010-06-111-6/+22
| | | | | | Introduce the VEX_X field llvm-svn: 105859
* Split out these asserts so it's more apparent why we're not assemblingEric Christopher2010-06-081-2/+2
| | | | | | that rip-relative address when executing in 32-bit mode. llvm-svn: 105656
* Reapply r105521, this time appending "LLU" to 64 bitBruno Cardoso Lopes2010-06-081-19/+197
| | | | | | immediates to avoid breaking the build. llvm-svn: 105652
* revert r105521, which is breaking the buildbots with stuff like this:Chris Lattner2010-06-051-197/+19
| | | | | | | | | | | | | | In file included from X86InstrInfo.cpp:16: X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type llvm-svn: 105524
* Initial AVX support for some instructions. No patterns matchedBruno Cardoso Lopes2010-06-051-19/+197
| | | | | | yet, only assembly encoding support. llvm-svn: 105521
* MCCodeEmitter: Add target independent fixup flag for is-pc-relative.Daniel Dunbar2010-03-191-4/+4
| | | | llvm-svn: 98954
* X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, weDaniel Dunbar2010-03-181-2/+4
| | | | | | | were missing it on some movq instructions and were not including the appropriate PCrel bias. llvm-svn: 98880
* fix an x86-64 encoding bug Daniel found.Chris Lattner2010-03-181-1/+4
| | | | llvm-svn: 98855
* add a special relocation type for movq loads for objectChris Lattner2010-03-181-3/+12
| | | | | | | files that produce special relocation types where the linker changes movq's into lea's. llvm-svn: 98839
* make pcrel immediate values relative to the start of the field,Chris Lattner2010-02-161-3/+13
| | | | | | not the end of the field, fixing rdar://7651978 llvm-svn: 96330
* teach the encoder to handle pseudo instructions like FP_REG_KILL,Chris Lattner2010-02-131-3/+4
| | | | | | encoding them into nothing. llvm-svn: 96110
* X86: Move extended MCFixupKinds into X86FixupKinds.hDaniel Dunbar2010-02-131-11/+1
| | | | llvm-svn: 96088
* add encoder support and tests for rdtscpChris Lattner2010-02-131-0/+4
| | | | llvm-svn: 96076
* remove special cases for vmlaunch, vmresume, vmxoff, and swapgsChris Lattner2010-02-131-0/+16
| | | | | | fix swapgs to be spelled right. llvm-svn: 96058
* Remove special cases for [LM]FENCE, MONITOR and MWAIT fromChris Lattner2010-02-121-13/+3
| | | | | | encoder and decoder by using new MRM_ forms. llvm-svn: 96048
* implement the rest of correct x86-64 encoder support for Chris Lattner2010-02-121-5/+9
| | | | | | rip-relative addresses, and add a testcase. llvm-svn: 96040
* give MCCodeEmitters access to the current MCContext.Chris Lattner2010-02-121-2/+4
| | | | llvm-svn: 96038
* implement infrastructure to support fixups for rip-rel Chris Lattner2010-02-121-13/+28
| | | | | | | addressing. This isn't complete because I need an MCContext to generate new MCExprs. llvm-svn: 96036
* pull the rip-relative addressing mode case up early.Chris Lattner2010-02-121-5/+12
| | | | llvm-svn: 96031
* fixme resolved!Chris Lattner2010-02-121-1/+0
| | | | llvm-svn: 96029
* start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls.Chris Lattner2010-02-121-23/+28
| | | | llvm-svn: 96028
* add a bunch of mod/rm encoding types for fixed mod/rm bytes.Chris Lattner2010-02-121-0/+20
| | | | | | | This will work better for the disassembler for modeling things like lfence/monitor/vmcall etc. llvm-svn: 95960
* fix the encodings of monitor and mwait, which were completelyChris Lattner2010-02-121-7/+2
| | | | | | | busted in both encoders. I'm not bothering to fix it in the old one at this point. llvm-svn: 95947
* add a new MCInstPrinter::getOpcodeName interface, when it is Chris Lattner2010-02-111-4/+4
| | | | | | | implemented, llvm-mc --show-inst now uses it to print the instruction opcode as well as the number. llvm-svn: 95929
* make getFixupKindInfo return a const reference, allowingChris Lattner2010-02-111-4/+7
| | | | | | | the tables to be const. Teach MCCodeEmitter to handle the target-indep kinds so that we don't crash on them. llvm-svn: 95924
* switch to target-indep fixups for 1/2/4/8 byte data.Chris Lattner2010-02-111-14/+9
| | | | llvm-svn: 95920
* refactor the conditional jump instructions in the .td file toChris Lattner2010-02-111-0/+2
| | | | | | | use a multipattern that generates both the 1-byte and 4-byte versions from the same defm llvm-svn: 95901
* dont' call getX86RegNum on X86::RIP, it doesn't like that. ThisChris Lattner2010-02-111-2/+4
| | | | | | fixes the remaining x86-64 jit failures afaik. llvm-svn: 95867
* fix a really nasty bug I introduced in r95693: r12 (and r12d, Chris Lattner2010-02-111-4/+6
| | | | | | | | | r12b, etc) also encodes to a R/M value of 4, which is just as illegal as ESP/RSP for the non-sib version an address. This fixes x86-64 jit miscompilations of a bunch of programs. llvm-svn: 95866
* Add and commonize encoder support for all immediates.Chris Lattner2010-02-111-110/+35
| | | | | | | | | | | | | | | Stub out some dummy fixups to make things work. We can now emit fixups like this: subl $20, %esp ## encoding: [0x83,0xec,A] ## fixup A - offset: 2, value: 20, kind: fixup_1byte_imm Emitting $20 as a single-byte fixup to be later resolved by the assembler is ridiculous of course (vs just emitting the byte) but this is a failure of the matcher, which should be producing an imm of 20, not an MCExpr of 20. llvm-svn: 95860
* generalize EmitDisplacementField to work with any sizeChris Lattner2010-02-111-14/+13
| | | | | | and rename it to EmitImmediate. llvm-svn: 95859
* eliminate the dead IsPCRel argument.Chris Lattner2010-02-111-9/+6
| | | | llvm-svn: 95858
* eliminate the dead "PCAdj" logic.Chris Lattner2010-02-111-22/+9
| | | | llvm-svn: 95857
* emit some simple (and probably incorrect) fixups for symbolicChris Lattner2010-02-101-34/+32
| | | | | | displacement values. llvm-svn: 95773
* keep track of what the current byte being emitted isChris Lattner2010-02-101-74/+87
| | | | | | throughout the X86 encoder. llvm-svn: 95771
* simplify displacement handling, emit displacements by-operandChris Lattner2010-02-101-50/+19
| | | | | | even for the immediate case. No functionality change. llvm-svn: 95770
* MC: First cut at MCFixup, for getting fixup/relocation information out of an ↵Daniel Dunbar2010-02-091-2/+22
| | | | | | MCCodeEmitter. llvm-svn: 95708
* port encoder enhancements over to the new encoder.Chris Lattner2010-02-091-20/+34
| | | | llvm-svn: 95699
* add note.Chris Lattner2010-02-051-0/+2
| | | | llvm-svn: 95445
* port X86InstrInfo::determineREX over to the new encoder.Chris Lattner2010-02-051-3/+97
| | | | llvm-svn: 95440
* wire up 64-bit MCCodeEmitter.Chris Lattner2010-02-051-6/+10
| | | | llvm-svn: 95438
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