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* | Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT. | Craig Topper | 2011-10-07 | 1 | -0/+15 | |
| | | | | llvm-svn: 141354 | |||||
* | Fix register printing in disassembling of push/pop of segment registers and ↵ | Craig Topper | 2011-09-22 | 1 | -38/+38 | |
| | | | | | | in/out in Intel syntax mode. Fixes PR10960 llvm-svn: 140299 | |||||
* | Recognize the xstorerng alias for VIA PadLock's xstore instruction. | Joerg Sonnenberger | 2011-06-30 | 1 | -0/+2 | |
| | | | | llvm-svn: 134126 | |||||
* | fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately, | Chris Lattner | 2011-04-09 | 1 | -0/+7 | |
| | | | | | | | InstAlias doesn't allow matching immediate operands, so we have to write C++ code to do this. llvm-svn: 129223 | |||||
* | Add support for the VIA PadLock instructions. | Joerg Sonnenberger | 2011-04-04 | 1 | -0/+20 | |
| | | | | llvm-svn: 128826 | |||||
* | PR9377: Handle x86 str with register operand in a way consistent with gas. | Eli Friedman | 2011-03-04 | 1 | -4/+9 | |
| | | | | llvm-svn: 126970 | |||||
* | Implement xgetbv and xsetbv. | Rafael Espindola | 2011-02-22 | 1 | -0/+5 | |
| | | | | | | Patch by Jai Menon. llvm-svn: 126165 | |||||
* | Added the x86 instruction ud2b (2nd official undefined instruction). | Kevin Enderby | 2010-10-27 | 1 | -1/+3 | |
| | | | | llvm-svn: 117485 | |||||
* | Reverting r117031 to cleanup valgrind errors. | Andrew Trick | 2010-10-22 | 1 | -4/+4 | |
| | | | | | | | It doesn't look like anything is wrong with the checkin, but the new test cases expose a mem bug in AsmParser. llvm-svn: 117087 | |||||
* | More tweaks to X86 instructions to allow the 'w' suffix in places it makes | Kevin Enderby | 2010-10-21 | 1 | -4/+4 | |
| | | | | | | | | | sense, when the instruction takes the 16-bit ax register or m16 memory location. These changes to llvm-mc matches what the darwin assembler allows for these instructions. Also added the missing flex (without the wait prefix) and ud2a as an alias to ud2 (still to add ud2b). llvm-svn: 117031 | |||||
* | Added a few tweaks to the Intel Descriptor-table support instructions to allow | Kevin Enderby | 2010-10-19 | 1 | -0/+8 | |
| | | | | | | | word forms and suffixed versions to match the darwin assembler in 32-bit and 64-bit modes. This is again for use just with assembly source for llvm-mc . llvm-svn: 116773 | |||||
* | move the atomic pseudo instructions out to X86InstrCompiler.td | Chris Lattner | 2010-10-05 | 1 | -0/+8 | |
| | | | | llvm-svn: 115599 | |||||
* | continue moving stuff out to X86InstrSystem.td. Move | Chris Lattner | 2010-10-05 | 1 | -39/+108 | |
| | | | | | | | | control flow stuff out to X86InstrControl.td. Move some compiler pseudo instructions and Pat<> patterns out to X86InstrCompiler.td llvm-svn: 115596 | |||||
* | refactor .td files a bit, moving system instructions out to X86InstrSystem.td | Chris Lattner | 2010-10-05 | 1 | -0/+303 | |
llvm-svn: 115591 |