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path: root/llvm/lib/Target/X86/X86InstrShiftRotate.td
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* Fix typo. Change %cl to CL in Intel pattern.Craig Topper2013-07-221-1/+1
* whitespaceNadav Rotem2013-05-041-2/+2
* Annotate shifts and rotates with SchedRW lists.Jakob Stoklund Olesen2013-03-251-17/+37
* Add hasSideEffects=0 to some shift and rotate instructions. None of which are...Craig Topper2012-12-271-1/+5
* Add SARX/SHRX/SHLX code generation supportMichael Liao2012-09-261-0/+55
* Add RORX code generation supportMichael Liao2012-09-261-0/+23
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-3/+3
* Instruction scheduling itinerary for Intel Atom.Andrew Trick2012-02-011-192/+287
* Intel style asm variant does not need '%' prefix.Devang Patel2012-01-031-14/+14
* Add X86 SARX, SHRX, and SHLX instructions.Craig Topper2011-10-231-18/+32
* Add X86 RORX instructionCraig Topper2011-10-231-0/+21
* rework the rotate-by-1 instructions to be defined like theChris Lattner2010-11-061-16/+16
* integrate the 64-bit shifts into X86InstrShiftRotate.td. Enough for tonight.Chris Lattner2010-10-051-81/+249
* move 32-bit shift and rotates out to their own file.Chris Lattner2010-10-051-0/+578
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