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path: root/llvm/lib/Target/X86/X86InstrMMX.td
Commit message (Expand)AuthorAgeFilesLines
* Revert "Look through PHIs to find additional register sources"Bruno Cardoso Lopes2015-07-151-2/+1
* Look through PHIs to find additional register sourcesBruno Cardoso Lopes2015-07-151-1/+2
* [X86][MMX] Prevent MMX_MOVD64rm foldingBruno Cardoso Lopes2015-02-251-1/+0
* [X86][MMX] Support folding loads in psll, psrl and psra intrinsicsBruno Cardoso Lopes2015-02-231-0/+19
* [X86] Add some missing redundant MMX and SSE encodings for disassembler.Craig Topper2015-02-221-0/+11
* [X86][MMX] Handle i32->mmx conversion using movdBruno Cardoso Lopes2015-02-051-0/+10
* [X86][MMX] Move MMX DAG node to proper fileBruno Cardoso Lopes2015-02-051-3/+0
* [X86] Replace i32i8imm on SSE/AVX instructions with i32u8imm which will make ...Craig Topper2015-01-251-4/+4
* [x86] Remove some unnecessary and slightly confusing typecasts from some patt...Craig Topper2015-01-211-4/+4
* [X86] Convert all the i8imm used by AVX512 and MMX instructions to u8imm.Craig Topper2015-01-211-4/+4
* [X86] Clean up whitespace as well as minor coding styleMichael Liao2014-12-041-9/+9
* Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.Craig Topper2014-11-261-1/+1
* [X86][SchedModel] Fixed missing/wrong scheduling model found by code inspection.Quentin Colombet2014-08-071-2/+2
* [X86][SchedModel] Fixed some wrong scheduling model found by code inspection.Quentin Colombet2014-08-061-7/+14
* [X86] Fix missing/wrong scheduling model found by code inspection.Quentin Colombet2014-04-231-1/+2
* [X86] Add disassembler support for the 0x0f 0x7f form of movq %mm, %mm.Craig Topper2014-04-171-0/+5
* Revert r205599, the commit was not intended to have so many changesQuentin Colombet2014-04-041-2/+1
* [RegAllocGreedy][Last Chance Recoloring] Emit diagnostics when last chanceQuentin Colombet2014-04-041-1/+2
* Add an x86 prefix encoding for instructions that would decode to a different ...Craig Topper2014-02-181-3/+3
* Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix ...Craig Topper2014-01-141-3/+3
* Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instru...Craig Topper2013-10-141-9/+10
* Replace a couple instructions with patterns referring to other instructions w...Craig Topper2013-10-091-16/+11
* Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. Thi...Craig Topper2013-10-091-4/+4
* Remove unneeded MMX instruction definition by moving pattern to an equivalent...Craig Topper2013-10-081-6/+2
* Adds support for Atom Silvermont (SLM) - -march=slmPreston Gurd2013-09-131-1/+1
* X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equ...Benjamin Kramer2013-06-141-7/+8
* Reapply "Subtract isn't commutative, fix this for MMX psub." withEric Christopher2013-05-141-7/+7
* Temporarily revert "Subtract isn't commutative, fix this for MMX psub."Eric Christopher2013-05-141-7/+7
* Subtract isn't commutative, fix this for MMX psub.Eric Christopher2013-05-141-7/+7
* Annotate x87 and mmx instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-261-24/+52
* Remove IIC_DEFAULT from X86Schedule.tdJakob Stoklund Olesen2013-03-251-2/+2
* X86 MMX: optimize transfer from mmx to i32Manman Ren2012-10-301-2/+8
* Introduce 'UseSSEx' to force SSE legacy encodingMichael Liao2012-08-301-32/+33
* Remove the LowerMMXCONCAT_VECTORS function. It could never execute because th...Craig Topper2012-08-131-14/+0
* Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1.Craig Topper2012-07-301-2/+2
* Added X86 Atom latencies to X86InstrMMX.td.Preston Gurd2012-05-111-129/+274
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Instruction scheduling itinerary for Intel Atom.Andrew Trick2012-02-011-4/+8
* Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicate...Craig Topper2012-01-101-20/+20
* Don't disable MMX support when AVX is enabled. Fix predicates for MMX instruc...Craig Topper2012-01-091-24/+24
* PR9848: pandn is not commutative.Eli Friedman2011-05-051-1/+1
* The pshufw instruction came about in MMX2 when SSE was introduced. Don't placeBill Wendling2010-10-041-3/+3
* the immediate field of pshufw is actually an 8-bit field, not a 8-bit field t...Chris Lattner2010-10-031-2/+2
* add support for the prefetch/prefetchw instructions, move femms intoChris Lattner2010-10-031-3/+1
* stub out a header to put 3dNow! instructions into.Chris Lattner2010-10-021-1/+1
* fix a regression introduced in r115243, in which the instructionChris Lattner2010-10-021-0/+16
* Massive rewrite of MMX: Dale Johannesen2010-09-301-493/+69
* Move remaining MMX instructions from SSE to MMX.Dale Johannesen2010-09-091-62/+44
* Move most MMX instructions (defined as anything thatDale Johannesen2010-09-091-1/+120
* Add intrinsic-based patterns for MMX PINSRW and PEXTRW.Dale Johannesen2010-09-081-0/+19
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