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* Fix nasty mingw32 bug, which e.g. prevented llvm-gcc bootstrap there.Anton Korobeynikov2010-08-251-3/+4
| | | | | | | | Mark _alloca call as clobberring EFLAGS, otherwise some DCE might remove other flags-clobberring stuff (e.g. cmp instructions) occuring after _alloca call. llvm-svn: 112034
* Add a new llvm.x86.int intrinsic, allowing access to the Chris Lattner2010-08-231-3/+7
| | | | | | x86 int and int3 instructions. Patch by Peter Housel! llvm-svn: 111831
* fix PR7465, mishandling of lcall and ljmp: intersegment long Chris Lattner2010-08-191-12/+12
| | | | | | call and jumps. llvm-svn: 111496
* Rework how the non-sse2 memory barrier is lowered so that theEric Christopher2010-08-141-8/+7
| | | | | | | | encoding is correct for the built-in assembler. Based on a patch from Chris. llvm-svn: 111083
* Wording.Eric Christopher2010-08-091-1/+1
| | | | llvm-svn: 110618
* Be a little bit more specific about target for the memory barrierEric Christopher2010-08-051-1/+2
| | | | | | instructions. llvm-svn: 110360
* Make x86-64 membarriers work without sse and clean up some of theEric Christopher2010-08-041-2/+2
| | | | | | uses. llvm-svn: 110274
* Fix typo!Bruno Cardoso Lopes2010-07-301-8/+8
| | | | llvm-svn: 109877
* Temporary hack to let codegen assert or generate poor code in caseBruno Cardoso Lopes2010-07-261-8/+13
| | | | | | | | | we are using AVX and no AVX version of the desired intruction is present, this is better for incremental dev (without fallbacks it's easier to spot what's missing). Not sure this is the best hack thought (we can also disable all HasSSE* predicates by dinamically marking them 'false' if AVX is present) llvm-svn: 109434
* Add x86 CLMUL (Carry-less multiplication) cpu featureBruno Cardoso Lopes2010-07-231-0/+1
| | | | llvm-svn: 109206
* Add complete assembler support for FMA3 instructions, with descriptions and ↵Bruno Cardoso Lopes2010-07-231-0/+6
| | | | | | encodings taken from the AVX manual llvm-svn: 109204
* Custom lower the memory barrier instructions and add supportEric Christopher2010-07-221-0/+29
| | | | | | | | for lowering without sse2. Add a couple of new testcases. Fixes a few libgomp tests and latent bugs. Remove a few todos. llvm-svn: 109078
* Pulling out previous patch, must've run the tests inEric Christopher2010-07-211-21/+0
| | | | | | the wrong directory. llvm-svn: 109005
* Lower MEMBARRIER on x86 and support processors without SSE2.Eric Christopher2010-07-211-0/+21
| | | | | | | Fixes a pile of libgomp failures in the llvm-gcc testsuite due to the libcall not existing. llvm-svn: 109004
* Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!Bruno Cardoso Lopes2010-07-191-1/+1
| | | | llvm-svn: 108769
* X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the sameDaniel Dunbar2010-07-191-2/+2
| | | | | | | | instruction, we only want to allow the one for the current subtarget. - This also fixes suffix matching for jmp instructions, because it eliminates the ambiguity between 'jmpl' and 'jmpq'. llvm-svn: 108746
* X86: Mark some tail call pseduo instruction as code gen only.Daniel Dunbar2010-07-191-1/+2
| | | | llvm-svn: 108684
* X86: Mark In32/64BitMode on LEAVE[64] and SYSEXIT[64].Daniel Dunbar2010-07-191-2/+2
| | | | llvm-svn: 108683
* X86: Mark MOV.*_{TC,NOREX} instruction as code gen only, they aren't real.Daniel Dunbar2010-07-191-0/+4
| | | | llvm-svn: 108680
* X86: MOV8o8a, MOV8ao8, etc. are only valid in 32-bit mode.Daniel Dunbar2010-07-191-6/+12
| | | | llvm-svn: 108679
* Start the support for AVX instructions with 256-bit %ymm registers. A couple ofBruno Cardoso Lopes2010-07-091-1/+1
| | | | | | | | | | | | | | | notes: - The instructions are being added with dummy placeholder patterns using some 256 specifiers, this is not meant to work now, but since there are some multiclasses generic enough to accept them, when we go for codegen, the stuff will be already there. - Add VEX encoding bits to support YMM - Add MOVUPS and MOVAPS in the first round - Use "Y" as suffix for those Instructions: MOVUPSYrr, ... - All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX file. llvm-svn: 107996
* have the mc lowering process handle a few tail call forms, lowering them toChris Lattner2010-07-091-9/+1
| | | | | | | | | | | | | jumps where possible and turning the TAILCALL marker in the instruction asm string into a proper comment. This eliminates a FIXME and is on the path to finishing: rdar://7639610 - eliminate encoding and asm info for TAILJMPd TAILJMPr TAILJMPn, etc. However, I can't eliminate the encodings for these instructions because the JIT still exists and has its own copy of the encoder, sigh. llvm-svn: 107946
* Change LEA to have 5 operands for its memory operand, justChris Lattner2010-07-081-20/+16
| | | | | | | | | | | like all other instructions, even though a segment is not allowed. This resolves a bunch of gross hacks in the encoder and makes LEA more consistent with the rest of the instruction set. No functionality change. llvm-svn: 107934
* Implement the major chunk of PR7195: support for 'callw'Chris Lattner2010-07-071-0/+7
| | | | | | | in the integrated assembler. Still some discussion to be done. llvm-svn: 107825
* Add a couple more quick comments.Eric Christopher2010-06-241-0/+2
| | | | llvm-svn: 106717
* Update according to feedback.Eric Christopher2010-06-231-4/+4
| | | | llvm-svn: 106677
* Add support for the x86 instructions "pusha" and "popa".Nico Weber2010-06-231-0/+11
| | | | llvm-svn: 106671
* Update uses, defs, and comments for darwin tls patterns.Eric Christopher2010-06-231-6/+5
| | | | llvm-svn: 106621
* Finish ripping isTwoAddress out of X86. Some mindless formattingEric Christopher2010-06-191-132/+153
| | | | | | | | | | and operand renaming to help. The giant turn the constraints on and selectively turn it off should probably be inverted at some point since it's just largely 50/50. llvm-svn: 106367
* Ensure that mov and not lea are used to stick the address intoEric Christopher2010-06-081-2/+2
| | | | | | the register. While we're at it, make sure it's in the right one. llvm-svn: 105645
* Add first pass at darwin tls compiler support.Eric Christopher2010-06-031-0/+17
| | | | llvm-svn: 105381
* AsmMatcher/X86: Mark _REV instructions as "code gen only", they aren't expectedDaniel Dunbar2010-05-261-0/+14
| | | | | | to be matched. llvm-svn: 104757
* Fix the x86 move to/from segment register instructions.Kevin Enderby2010-05-261-4/+12
| | | | llvm-svn: 104731
* Rename X86 subregister indices to something shorter.Jakob Stoklund Olesen2010-05-241-18/+18
| | | | | | Use the tablegen-produced enums. llvm-svn: 104493
* MC/X86: Subdivide immediates a bit more, so that we properly recognize ↵Daniel Dunbar2010-05-221-7/+32
| | | | | | | | | | | immediates based on the width of the target instruction. For example: addw $0xFFFF, %ax should match the same as addw $-1, %ax but we used to match it to the longer encoding. llvm-svn: 104453
* tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses ↵Daniel Dunbar2010-05-221-5/+5
| | | | | | instead of just one. llvm-svn: 104452
* X86: Model i64i32imm properly, as a subclass of all immediates.Daniel Dunbar2010-05-201-1/+6
| | | | llvm-svn: 104272
* Fix assembly parsing and encoding of the pushf and popf family ofDan Gohman2010-05-201-4/+6
| | | | | | instructions. llvm-svn: 104231
* MC/X86: Lower TAILCALLd[64] to JMP_1, to allow relaxation and to avoid sameDaniel Dunbar2010-05-191-0/+7
| | | | | | | prefix byte problem as in r104062. - As a total hack to keep the TAILCALL markers in the output, which some tests depend on, this invents a new TAILJMP_1 instruction. llvm-svn: 104120
* Fix so "int3" is correctly accepted, added "into" and fixed "int" with anKevin Enderby2010-05-141-2/+4
| | | | | | argument, like "int $4", to not get an Assertion error. llvm-svn: 103791
* Set isTerminator on TRAP instructions.Dan Gohman2010-05-141-1/+1
| | | | llvm-svn: 103778
* Add mayLoad and mayStore flags to instructions which missed them.Dan Gohman2010-05-141-1/+9
| | | | llvm-svn: 103776
* reapply r103668 with a fix. Never make "minor syntax changes"Chris Lattner2010-05-131-3/+3
| | | | | | after testing before committing. llvm-svn: 103681
* revert r103668 for now, it is apparently breaking things.Chris Lattner2010-05-121-3/+3
| | | | llvm-svn: 103677
* moffset forms of moves are x86-32 only, make the parserChris Lattner2010-05-121-3/+3
| | | | | | | | lower them to the correct x86-64 instructions since we don't have a clean way to handle this in td files yet. rdar://7947184 llvm-svn: 103668
* fix the encoding of the obscure "moffset" forms of moves, i386Chris Lattner2010-05-121-5/+6
| | | | | | part first. rdar://7947184 llvm-svn: 103660
* MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand.Daniel Dunbar2010-05-061-4/+4
| | | | | | - This fixes "leal 0, %eax", for example. llvm-svn: 103205
* Eliminated the classification of control registers into %ecr_Sean Callanan2010-05-061-4/+4
| | | | | | | | | and %rcr_, leaving just %cr_ which is what people expect. Updated the disassembler to support this unified register set. Added a testcase to verify that the registers continue to be decoded correctly. llvm-svn: 103196
* Fixed the encoding of the x86 push instructions. Using a 32-bit immediate valueKevin Enderby2010-05-031-4/+4
| | | | | | | | | | caused the a pushl instruction to be incorrectly encoding using only two bytes of immediate, causing the following 2 instruction bytes to be part of the 32-bit immediate value. Also fixed the one byte form of push to be used when the immediate would fit in a signed extended byte. Lastly changed the names to not include the 32 of PUSH32 since they actually push the size of the stack pointer. llvm-svn: 102951
* Remove the -disable-16bit command-line option, which is now obsolete.Dan Gohman2010-04-301-12/+0
| | | | llvm-svn: 102730
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