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path: root/llvm/lib/Target/X86/X86InstrFormats.td
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* AVX-512: added all forms of VPSHUFD and VPSHUFHW, VPSHUFLWElena Demikhovsky2015-06-011-0/+8
* AVX-512: Enabled SSE intrinsics on AVX-512.Elena Demikhovsky2015-05-211-2/+19
* AVX-512: Added all forms of FP compare instructions for KNL and SKX.Elena Demikhovsky2015-05-071-0/+8
* [X86] Add the remaining 11 possible exact ModRM formats. This makes their enc...Craig Topper2015-02-151-17/+21
* [x86] Give movss and movsd execution domains in the x86 backend.Chandler Carruth2015-02-041-2/+3
* [X86] Remove the single AdSize indicator and replace it with separate AdSize1...Craig Topper2014-12-241-29/+42
* [AVX512] Add support for 512b variable bit shift intrinsics.Cameron McInally2014-12-111-0/+3
* [X86] Clean up whitespace as well as minor coding styleMichael Liao2014-12-041-24/+24
* [AVX512] Add 512b masked integer shift by immediate patterns.Cameron McInally2014-11-141-0/+4
* [AVX512] Two new attributes in X86VectorVTInfo for subvector insertAdam Nemet2014-10-151-0/+1
* [AVX512] Refactoring of avx512_binop_rm multiclass through AVX512_masking.Robert Khasanov2014-10-081-0/+3
* [AVX512] Add masking variant for the FMA instructionsAdam Nemet2014-08-141-1/+2
* [AVX512] Generate masking instruction variants with tablegenAdam Nemet2014-08-071-0/+8
* Add support for the X86 secure guard extensions instructions in assembler (SGX).Kevin Enderby2014-07-311-14/+15
* [SKX] Enabling SKX target and AVX512BW, AVX512DQ, AVX512VL features.Robert Khasanov2014-07-211-0/+2
* [X86] AVX512: Rename EVEX_CD8V to CD8_FormAdam Nemet2014-07-171-5/+5
* [X86] AVX512: Use the TD version of CD8_Scale in the assemblerAdam Nemet2014-07-171-14/+5
* [X86] AVX512: Move compressed displacement logic to TDAdam Nemet2014-07-171-0/+30
* [x86] Remove some unused instruction format classes.Craig Topper2014-02-261-12/+0
* [x86] Simplify disassembler code slightly.Craig Topper2014-02-261-4/+8
* [x86] Switch PAUSE instruction to use XS prefix instead of HasREPPrefix. Remo...Craig Topper2014-02-201-0/+1
* Remove special FP opcode maps and instead add enough MRM_XX formats to handle...Craig Topper2014-02-191-53/+27
* Reduce size of map field in X86 TSFlags since it now requires less bits.Craig Topper2014-02-191-26/+26
* Put some of the X86 formats in a more logical order.Craig Topper2014-02-191-20/+20
* Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0x...Craig Topper2014-02-191-4/+2
* Add PS prefix to some classes I missed in r201538.Craig Topper2014-02-181-2/+2
* Add an x86 prefix encoding for instructions that would decode to a different ...Craig Topper2014-02-181-48/+52
* Recommit r201059 and r201060 with hopefully a fix for its original failure.Craig Topper2014-02-101-0/+1
* Revert r201059 and r201060.Bob Wilson2014-02-101-1/+0
* Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' fie...Craig Topper2014-02-101-0/+1
* Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 ...Craig Topper2014-02-021-6/+13
* Merge HasVEXPrefix/HasEVEXPrefix/HasXOPPrefix into a 2-bit 'encoding' field i...Craig Topper2014-02-021-48/+60
* Simplify some x86 format classes and remove some ambiguities in their applica...Craig Topper2014-02-011-12/+12
* Separate x86 opcode maps and 0x66/0xf2/0xf3 prefixes from each other in the T...Craig Topper2014-01-311-58/+96
* Move REP out of the Prefix field of the X86 format. Give it its own bit. It h...Craig Topper2014-01-311-21/+23
* [x86] Fix signed relocations for i64i32imm operandsDavid Woodhouse2014-01-301-26/+36
* ]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)David Woodhouse2014-01-221-0/+1
* [x86] Allow address-size overrides for STOS[BWLQ] (PR9385)David Woodhouse2014-01-221-1/+1
* [x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)David Woodhouse2014-01-221-0/+1
* Allow x86 mov instructions to/from memory with absolute address to be encoded...Craig Topper2014-01-161-1/+1
* AVX-512: optimized scalar compare patternsElena Demikhovsky2014-01-141-4/+0
* Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix ...Craig Topper2014-01-141-62/+65
* [x86] Fix retq/retl handling in 64-bit modeDavid Woodhouse2014-01-131-0/+3
* AVX-512: Embedded Rounding Control - encoding and printingElena Demikhovsky2014-01-131-0/+3
* Remove SegOvrBits from X86 TSFlags since they weren't being used.Craig Topper2014-01-061-23/+19
* Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit modeCraig Topper2014-01-061-26/+29
* Add a new x86 specific instruction flag to force some isCodeGenOnly instructi...Craig Topper2014-01-051-0/+4
* Remove MRMInitReg form now that it's last use is gone.Craig Topper2013-12-311-1/+0
* [x86] Rename In32BitMode predicate to Not64BitModeEric Christopher2013-12-201-1/+1
* Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. Thi...Craig Topper2013-10-091-0/+4
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