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* Eliminate all remaining tabs and trailing spaces.Jeff Cohen2005-07-271-43/+43
| | | | llvm-svn: 22523
* For: memory operations -> storesReid Spencer2005-07-191-0/+5
| | | | | | | | | | | | | | | | This is the first incremental patch to implement this feature. It adds no functionality to LLVM but setup up the information needed from targets in order to implement the optimization correctly. Each target needs to specify the maximum number of store operations for conversion of the llvm.memset, llvm.memcpy, and llvm.memmove intrinsics into a sequence of store operations. The limit needs to be chosen at the threshold of performance for such an optimization (generally smallish). The target also needs to specify whether the target can support unaligned stores for multi-byte store operations. This helps ensure the optimization doesn't generate code that will trap on an alignment errors. More patches to follow. llvm-svn: 22468
* Teach the legalizer how to promote SINT_TO_FP to a wider SINT_TO_FP thatNate Begeman2005-07-161-45/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the target natively supports. This eliminates some special-case code from the x86 backend and generates better code as well. For an i8 to f64 conversion, before & after: _x87 before: subl $2, %esp movb 6(%esp), %al movsbw %al, %ax movw %ax, (%esp) filds (%esp) addl $2, %esp ret _x87 after: subl $2, %esp movsbw 6(%esp), %ax movw %ax, (%esp) filds (%esp) addl $2, %esp ret _sse before: subl $12, %esp movb 16(%esp), %al movsbl %al, %eax cvtsi2sd %eax, %xmm0 addl $12, %esp ret _sse after: subl $12, %esp movsbl 16(%esp), %eax cvtsi2sd %eax, %xmm0 addl $12, %esp ret llvm-svn: 22452
* Remove all knowledge of UINT_TO_FP from the X86 backend, relying on theChris Lattner2005-07-161-53/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | legalizer to eliminate them. With this comes the expected code quality improvements, such as, for this: double foo(unsigned short X) { return X; } we now generate this: _foo: subl $4, %esp movzwl 8(%esp), %eax movl %eax, (%esp) fildl (%esp) addl $4, %esp ret instead of this: _foo: subl $4, %esp movw 8(%esp), %ax movzwl %ax, %eax ;; Load not folded into this. movl %eax, (%esp) fildl (%esp) addl $4, %esp ret -Chris llvm-svn: 22449
* Get closer to fully working scalar FP in SSE regs. This gets singlesourceNate Begeman2005-07-151-32/+26
| | | | | | working, and Olden/power. llvm-svn: 22441
* Implement Subtarget supportNate Begeman2005-07-121-3/+28
| | | | | | | | | | | | | | | | Implement the X86 Subtarget. This consolidates the checks for target triple, and setting options based on target triple into one place. This allows us to convert the asm printer and isel over from being littered with "forDarwin", "forCygwin", etc. into just having the appropriate flags for each subtarget feature controlling the code for that feature. This patch also implements indirect external and weak references in the X86 pattern isel, for darwin. Next up is to convert over the asm printers to use this new interface. llvm-svn: 22389
* Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.Chris Lattner2005-07-101-8/+8
| | | | | | | | | | | | This is the last MVTSDNode. This allows us to eliminate a bunch of special case code for handling MVTSDNodes. Also, remove some uses of dyn_cast that should really be cast (which is cheaper in a release build). llvm-svn: 22368
* Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNodeChris Lattner2005-07-101-5/+4
| | | | llvm-svn: 22366
* Restore some code that was accidentally removed by Nate's patch yesterday.Chris Lattner2005-07-071-1/+20
| | | | | | This fixes the regressions from last night. llvm-svn: 22344
* Fix a typo in my checkin today that caused regressions. Oops!Nate Begeman2005-07-071-1/+1
| | | | llvm-svn: 22341
* First round of support for doing scalar FP using the SSE2 ISA extension andNate Begeman2005-07-061-76/+319
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XMM registers. There are many known deficiencies and fixmes, which will be addressed ASAP. The major benefit of this work is that it will allow the LLVM register allocator to allocate FP registers across basic blocks. The x86 backend will still default to x87 style FP. To enable this work, you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc. An example before and after would be for: double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i) Sum += P[i]; return Sum; } The inner loop looks like the following: x87: .LBB_foo_1: # no_exit fldl (%esp) faddl (%eax,%ecx,8) fstpl (%esp) incl %ecx cmpl $1000, %ecx #FP_REG_KILL jne .LBB_foo_1 # no_exit SSE2: addsd (%eax,%ecx,8), %xmm0 incl %ecx cmpl $1000, %ecx #FP_REG_KILL jne .LBB_foo_1 # no_exit llvm-svn: 22340
* Make several cleanups to Andrews varargs change:Chris Lattner2005-07-051-18/+19
| | | | | | | | | | | | 1. Pass Value*'s into lowering methods so that the proper pointers can be added to load/stores from the valist 2. Intrinsics that return void should only return a token chain, not a token chain/retval pair. 3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone. 4. Now that we have Value*'s available in the lowering methods, pass them into any load/stores from the valist that are emitted llvm-svn: 22339
* Fit to 80 columnsChris Lattner2005-07-051-3/+6
| | | | llvm-svn: 22336
* If we support structs as va_list, we must pass pointers to them to va_copyAndrew Lenharth2005-06-221-13/+0
| | | | | | See last commit for LangRef, this implements it on all targets. llvm-svn: 22273
* core changes for varargsAndrew Lenharth2005-06-181-24/+37
| | | | llvm-svn: 22254
* silence a bogus warningChris Lattner2005-06-171-1/+1
| | | | llvm-svn: 22245
* Tailcalls require stubs to be emitted. Otherwise, the compilation callbackChris Lattner2005-05-191-1/+1
| | | | | | doesn't know who 'called' it. llvm-svn: 22136
* don't reserve space for tailcall arg areas. It explicitly managed.Chris Lattner2005-05-151-2/+4
| | | | llvm-svn: 22050
* Implement proper tail calls in the X86 backend for all fastcc->fastccChris Lattner2005-05-151-10/+295
| | | | | | tail calls. llvm-svn: 22046
* Pass i64 values correctly split in reg/mem to fastcc calls.Chris Lattner2005-05-141-2/+1
| | | | | | This fixes fourinarow with -enable-x86-fastcc. llvm-svn: 22022
* Use target-specific nodes for calls. This allows the fastcc code to not haveChris Lattner2005-05-141-105/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | to do ugly hackery to avoid emitting code like this: call foo mov vreg, EAX adjcallstackup ... If foo is a fastcc call and if vreg gets spilled, we might end up with this: call foo mov [ESP+offset], EAX ;; Offset doesn't consider the 12! sub ESP, 12 Which is bad. The previous hacky code to deal with this was A) gross B) not good enough. In particular, it could miss cases and emit the bad code above. Now we always emit this: call foo adjcallstackup ... mov vreg, EAX directly. This makes fastcc with callees poping the stack work much better. Next stop (finally!) really is tail calls. llvm-svn: 22021
* use a target-specific node and custom expander to lower long->FP to FILD64m.Chris Lattner2005-05-141-0/+74
| | | | | | | This should fix some missing symbols problems on BSD and improve performance of programs that use that operation. llvm-svn: 22012
* Make sure the start of the arg area and the end (after the RA is pushed)Chris Lattner2005-05-131-2/+22
| | | | | | is always 8-byte aligned for fastcc llvm-svn: 21995
* fix typoChris Lattner2005-05-131-3/+3
| | | | llvm-svn: 21991
* Fix the problems with callee popped argument listsChris Lattner2005-05-131-1/+37
| | | | llvm-svn: 21988
* Don't emit SAR X, 0 in the case of sdiv Y, 2Chris Lattner2005-05-131-2/+7
| | | | llvm-svn: 21986
* Fix UnitTests/2005-05-13-SDivTwo.cChris Lattner2005-05-131-2/+3
| | | | llvm-svn: 21985
* switch to having the callee pop stack operands for fastcc. This is ↵Chris Lattner2005-05-131-10/+23
| | | | | | | | currently buggy do not use llvm-svn: 21984
* Build TAILCALL nodes in LowerCallTo, treat them like normal calls everywhere.Chris Lattner2005-05-131-8/+14
| | | | llvm-svn: 21976
* Add an isTailCall flag to LowerCallToChris Lattner2005-05-131-3/+9
| | | | llvm-svn: 21958
* Do not CopyFromReg physregs for live-in values. Instead, create a vreg forChris Lattner2005-05-131-31/+70
| | | | | | | | | | each live in, and copy the regs from the vregs. As the very first thing we do in the function, insert copies from the pregs to the vregs. This fixes problems where the token chain of CopyFromReg was not enough to allow reordering of the copyfromreg nodes and other unchained nodes (e.g. div, which clobbers eax on intel). llvm-svn: 21932
* rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.Chris Lattner2005-05-121-9/+9
| | | | llvm-svn: 21915
* Add a new -enable-x86-fastcc option that enables passing the firstChris Lattner2005-05-121-11/+424
| | | | | | two integer values in registers for the fastcc calling conv. llvm-svn: 21912
* Pass in Calling Convention to use into LowerCallToChris Lattner2005-05-121-3/+3
| | | | llvm-svn: 21899
* X86 has more than just 32-bit registersChris Lattner2005-05-111-0/+6
| | | | llvm-svn: 21857
* Convert feature of the simple isel over for the pattern isel to use.Chris Lattner2005-05-101-5/+28
| | | | llvm-svn: 21840
* Silence some VC++ warningsJeff Cohen2005-05-101-1/+0
| | | | llvm-svn: 21838
* Implement READPORT/WRITEPORT, implementing the last X86 regression testsChris Lattner2005-05-091-2/+102
| | | | | | | | that were failing with the pattern selector. Note that the support that existed in the simple selector was clearly broken in several ways though (which has also been fixed). llvm-svn: 21831
* legalize readio/writeio into load/stores, fixing CodeGen/X86/io.llx withChris Lattner2005-05-091-0/+9
| | | | | | the pattern isel. llvm-svn: 21828
* restore some non-dead code I removed last night breaking double casts toChris Lattner2005-05-091-1/+3
| | | | | | uint llvm-svn: 21821
* Wrap long lines, remove dead code that is now handled by legalizeChris Lattner2005-05-091-55/+8
| | | | llvm-svn: 21811
* Fix FP -> bool castsChris Lattner2005-05-091-0/+2
| | | | llvm-svn: 21810
* Fix X86/2005-05-08-FPStackifierPHI.ll: ugly gross hack.Chris Lattner2005-05-091-2/+19
| | | | llvm-svn: 21801
* fix typoAndrew Lenharth2005-05-041-1/+1
| | | | llvm-svn: 21693
* Implement count leading zeros (ctlz), count trailing zeros (cttz), and countAndrew Lenharth2005-05-031-0/+3
| | | | | | | | | population (ctpop). Generic lowering is implemented, however only promotion is implemented for SelectionDAG at the moment. More coming soon. llvm-svn: 21676
* Add support for FSIN/FCOS when unsafe math ops are enabled. Patch contributed byChris Lattner2005-04-301-0/+10
| | | | | | Morten Ofstad! llvm-svn: 21632
* Add support for FSQRT node, patch contributed by Morten OfstadChris Lattner2005-04-281-4/+8
| | | | llvm-svn: 21610
* Implement Value* tracking for loads and stores in the selection DAG. This ↵Andrew Lenharth2005-04-271-5/+5
| | | | | | | | enables one to use alias analysis in the backends. (TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null. llvm-svn: 21599
* * Remove trailing whitespaceMisha Brukman2005-04-211-58/+58
| | | | | | * Convert tabs to spaces llvm-svn: 21426
* Handle (store &GV -> mem) as a store immediate. This often occurs forChris Lattner2005-04-211-0/+14
| | | | | | | | | | | | | printf format strings and other stuff. Instead of generating this: movl $l1__2E_str_1, %eax movl %eax, (%esp) we now emit: movl $l1__2E_str_1, (%esp) llvm-svn: 21406
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