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* Fix a bug in my last X86 checkin, pointed out by cozmicChris Lattner2006-01-131-1/+2
| | | | llvm-svn: 25293
* Enable X86 support for savestack/restorestackChris Lattner2006-01-131-1/+1
| | | | llvm-svn: 25278
* Fix sint_to_fp (fild*) support.Evan Cheng2006-01-121-2/+2
| | | | llvm-svn: 25257
* Support for MEMCPY and MEMSET.Evan Cheng2006-01-111-2/+2
| | | | llvm-svn: 25226
* * Add special entry code main() (to set x87 to 64-bit precision).Evan Cheng2006-01-111-3/+6
| | | | | | | | | * Allow a register node as SelectAddr() base. * ExternalSymbol -> TargetExternalSymbol as direct function callee. * Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for call parmater passing. llvm-svn: 25207
* implement FP_REG_KILL insertion for the dag-dag instruction selectorChris Lattner2006-01-111-1/+0
| | | | llvm-svn: 25192
* silence a bogus gcc warningChris Lattner2006-01-061-1/+1
| | | | llvm-svn: 25129
* Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patternsChris Lattner2005-12-211-38/+38
| | | | | | | | | | | | | | | that were overloaded to work before and after the stackifier runs. With the new clean world, it is possible to write patterns for these instructions: woo! This also adds a few simple patterns here and there, though there are a lot still missing. These should be easy to add though. :) See the comments under "Floating Point Stack Support" for more details on the new world order. This patch as absolutely no effect on the generated code, woo! llvm-svn: 24899
* Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo ↵Evan Cheng2005-12-141-1/+1
| | | | | | 12/14/2005 hbd failure. llvm-svn: 24717
* Fix PR672 another way which should be more robustChris Lattner2005-12-041-16/+14
| | | | llvm-svn: 24585
* Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.Chris Lattner2005-12-031-0/+14
| | | | | | | | This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc turned on. Given a clean nightly tester run, we should be able to turn it on by default! llvm-svn: 24578
* The second patch of X86 support for read cycle counter.Andrew Lenharth2005-11-201-0/+5
| | | | llvm-svn: 24430
* Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. PatchChris Lattner2005-11-151-1002/+3
| | | | | | contributed by Evan Cheng. llvm-svn: 24358
* Invert the TargetLowering flag that controls divide by consant expansion.Nate Begeman2005-10-211-54/+0
| | | | | | | | | | Add a new flag to TargetLowering indicating if the target has really cheap signed division by powers of two, make ppc use it. This will probably go away in the future. Implement some more ISD::SDIV folds in the dag combiner Remove now dead code in the x86 backend. llvm-svn: 23853
* Remove some dead code now that the dag combiner exists.Nate Begeman2005-10-151-15/+0
| | | | llvm-svn: 23754
* Properly split f32 and f64 into separate register classes for scalar sse fpNate Begeman2005-10-141-4/+4
| | | | | | fixing a bunch of nasty hackery llvm-svn: 23735
* silence some warningsChris Lattner2005-10-021-3/+2
| | | | llvm-svn: 23594
* Add FP versions of the binary operators, keeping the int and fp worlds seperate.Chris Lattner2005-09-281-6/+21
| | | | | | | | Though I have done extensive testing, it is possible that this will break things in configs I can't test. Please let me know if this causes a problem and I'll fix it ASAP. llvm-svn: 23505
* fix a major regression from my patch this afternoonChris Lattner2005-09-141-0/+1
| | | | llvm-svn: 23347
* This code is no longer needed, it is moved to the target-indep codeChris Lattner2005-09-131-25/+0
| | | | llvm-svn: 23332
* Handle any_extend like zextChris Lattner2005-09-021-0/+1
| | | | llvm-svn: 23202
* Adjust to member variable name change.Reid Spencer2005-08-271-1/+1
| | | | llvm-svn: 23119
* Fix a bug in my previous checkinChris Lattner2005-08-261-1/+1
| | | | llvm-svn: 23082
* Change ConstantPoolSDNode to actually hold the Constant itself instead ofChris Lattner2005-08-261-4/+9
| | | | | | | | putting it into the constant pool. This allows the isel machinery to create constants that it will end up deciding are not needed, without them ending up in the resultant function constant pool. llvm-svn: 23081
* Fix a warningChris Lattner2005-08-251-0/+1
| | | | llvm-svn: 23031
* The variable SAR's only take one operand tooChris Lattner2005-08-191-1/+1
| | | | llvm-svn: 22888
* Stop adding bogus operands to variable shifts on X86. These instructionsChris Lattner2005-08-191-2/+2
| | | | | | only take one operand. The other comes implicitly in through CL. llvm-svn: 22887
* update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodesChris Lattner2005-08-161-28/+26
| | | | llvm-svn: 22807
* Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nastyNate Begeman2005-08-161-0/+1
| | | | | | | fixme from the PowerPC backend. Emit slightly better code for legalizing select_cc. llvm-svn: 22805
* Fix last night's X86 regressions by putting code for SSE in the if(SSE)Nate Begeman2005-08-141-5/+5
| | | | | | block. nur. llvm-svn: 22788
* Fix FP_TO_UINT with Scalar SSE2 now that the legalizer can handle it. WeNate Begeman2005-08-141-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | now generate the relatively good code sequences: unsigned short foo(float a) { return a; } _foo: movss 4(%esp), %xmm0 cvttss2si %xmm0, %eax movzwl %ax, %eax ret and unsigned bar(float a) { return a; } _bar: movss .CPI_bar_0, %xmm0 movss 4(%esp), %xmm1 movapd %xmm1, %xmm2 subss %xmm0, %xmm2 cvttss2si %xmm2, %eax xorl $-2147483648, %eax cvttss2si %xmm1, %ecx ucomiss %xmm0, %xmm1 cmovb %ecx, %eax ret llvm-svn: 22786
* Update the targets to the new SETCC/CondCodeSDNode interfaces.Chris Lattner2005-08-091-54/+55
| | | | llvm-svn: 22729
* adjust to change in getSubtarget() apiChris Lattner2005-08-051-1/+1
| | | | llvm-svn: 22687
* Scalar SSE: load +0.0 -> xorps/xorpdNate Begeman2005-08-031-80/+122
| | | | | | | Scalar SSE: a < b ? c : 0.0 -> cmpss, andps Scalar SSE: float -> i16 needs to be promoted llvm-svn: 22637
* Update to use the new MathExtras.h support for log2 computation.Chris Lattner2005-08-021-1/+1
| | | | | | Patch contributed by Jim Laskey! llvm-svn: 22594
* Keep tabs and trailing spaces out.Jeff Cohen2005-07-301-14/+14
| | | | llvm-svn: 22565
* fix a typeoChris Lattner2005-07-301-1/+1
| | | | llvm-svn: 22561
* Change the fp to integer code to not perform 2-byte stores followed byChris Lattner2005-07-301-7/+4
| | | | | | | | | | | | | | | 1 byte loads and other operations. This is bad for store-forwarding on common CPUs. We now do this: fnstcw WORD PTR [%ESP] mov %AX, WORD PTR [%ESP] instead of: fnstcw WORD PTR [%ESP] mov %AL, BYTE PTR [%ESP + 1] llvm-svn: 22559
* Use a custom expander for all FP to int conversions, as the X86 only hasChris Lattner2005-07-301-71/+41
| | | | | | | FP-to-int-in-memory: this exposes the load from the stored slot to the selection dag, allowing it to be folded into other operaions. llvm-svn: 22556
* Implement a FIXME: move a bunch of cruft for handling FP_TO_*INT operationsChris Lattner2005-07-291-27/+17
| | | | | | | that the X86 does not support to the legalizer. This allows it to be better optimized, etc, and will help with SSE support. llvm-svn: 22551
* Don't forget to diddle with the control word when performing an FISTP64.Chris Lattner2005-07-291-8/+36
| | | | llvm-svn: 22550
* Use a custom expander to compile this:Chris Lattner2005-07-291-13/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | long %test4(double %X) { %tmp.1 = cast double %X to long ; <long> [#uses=1] ret long %tmp.1 } to this: _test4: sub %ESP, 12 fld QWORD PTR [%ESP + 16] fistp QWORD PTR [%ESP] mov %EDX, DWORD PTR [%ESP + 4] mov %EAX, DWORD PTR [%ESP] add %ESP, 12 ret instead of this: _test4: sub %ESP, 28 fld QWORD PTR [%ESP + 32] fstp QWORD PTR [%ESP] call ___fixdfdi add %ESP, 28 ret llvm-svn: 22549
* Eliminate all remaining tabs and trailing spaces.Jeff Cohen2005-07-271-43/+43
| | | | llvm-svn: 22523
* For: memory operations -> storesReid Spencer2005-07-191-0/+5
| | | | | | | | | | | | | | | | This is the first incremental patch to implement this feature. It adds no functionality to LLVM but setup up the information needed from targets in order to implement the optimization correctly. Each target needs to specify the maximum number of store operations for conversion of the llvm.memset, llvm.memcpy, and llvm.memmove intrinsics into a sequence of store operations. The limit needs to be chosen at the threshold of performance for such an optimization (generally smallish). The target also needs to specify whether the target can support unaligned stores for multi-byte store operations. This helps ensure the optimization doesn't generate code that will trap on an alignment errors. More patches to follow. llvm-svn: 22468
* Teach the legalizer how to promote SINT_TO_FP to a wider SINT_TO_FP thatNate Begeman2005-07-161-45/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the target natively supports. This eliminates some special-case code from the x86 backend and generates better code as well. For an i8 to f64 conversion, before & after: _x87 before: subl $2, %esp movb 6(%esp), %al movsbw %al, %ax movw %ax, (%esp) filds (%esp) addl $2, %esp ret _x87 after: subl $2, %esp movsbw 6(%esp), %ax movw %ax, (%esp) filds (%esp) addl $2, %esp ret _sse before: subl $12, %esp movb 16(%esp), %al movsbl %al, %eax cvtsi2sd %eax, %xmm0 addl $12, %esp ret _sse after: subl $12, %esp movsbl 16(%esp), %eax cvtsi2sd %eax, %xmm0 addl $12, %esp ret llvm-svn: 22452
* Remove all knowledge of UINT_TO_FP from the X86 backend, relying on theChris Lattner2005-07-161-53/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | legalizer to eliminate them. With this comes the expected code quality improvements, such as, for this: double foo(unsigned short X) { return X; } we now generate this: _foo: subl $4, %esp movzwl 8(%esp), %eax movl %eax, (%esp) fildl (%esp) addl $4, %esp ret instead of this: _foo: subl $4, %esp movw 8(%esp), %ax movzwl %ax, %eax ;; Load not folded into this. movl %eax, (%esp) fildl (%esp) addl $4, %esp ret -Chris llvm-svn: 22449
* Get closer to fully working scalar FP in SSE regs. This gets singlesourceNate Begeman2005-07-151-32/+26
| | | | | | working, and Olden/power. llvm-svn: 22441
* Implement Subtarget supportNate Begeman2005-07-121-3/+28
| | | | | | | | | | | | | | | | Implement the X86 Subtarget. This consolidates the checks for target triple, and setting options based on target triple into one place. This allows us to convert the asm printer and isel over from being littered with "forDarwin", "forCygwin", etc. into just having the appropriate flags for each subtarget feature controlling the code for that feature. This patch also implements indirect external and weak references in the X86 pattern isel, for darwin. Next up is to convert over the asm printers to use this new interface. llvm-svn: 22389
* Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.Chris Lattner2005-07-101-8/+8
| | | | | | | | | | | | This is the last MVTSDNode. This allows us to eliminate a bunch of special case code for handling MVTSDNodes. Also, remove some uses of dyn_cast that should really be cast (which is cheaper in a release build). llvm-svn: 22368
* Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNodeChris Lattner2005-07-101-5/+4
| | | | llvm-svn: 22366
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