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path: root/llvm/lib/Target/X86/X86.td
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* [X86] Heuristic to selectively build Newton-Raphson SQRT estimationNikolai Bozhenov2016-08-041-2/+17
* [X86] Add 'FeatureSlowSHLD' to cpu 'bdver4'Simon Pilgrim2016-07-241-0/+1
* Add new flag and intrinsic support for MWAITX and MONITORX instructionsAshutosh Nema2016-05-181-1/+4
* [X86] Enable the post-RA-scheduler for clang's default 32-bit cpu.Mitch Bodart2016-04-271-10/+26
* [X86] Introduce Lakemont CPU.Andrey Turetskiy2016-04-011-0/+3
* [X86] Introduction of FeatureX87.Andrey Turetskiy2016-03-231-66/+89
* [X86] AMD Bobcat CPU (btver1) doesn't support XSAVE Simon Pilgrim2016-03-051-1/+0
* Fix LLVM's handling and detection of skylake and cannonlake CPUsSanjoy Das2016-02-211-3/+2
* Remove Proc feature flags for X86 processors that are used to inherit feature...Craig Topper2016-02-131-36/+33
* Disable the vzeroupper insertion pass on PS4.Yunzhong Gao2016-02-121-1/+7
* [X86] Change FeatureIFMA string to 'avx512ifma'. Matches gcc and fixes PR26461.Craig Topper2016-02-081-1/+1
* Added Skylake client to X86 targets and featuresElena Demikhovsky2016-01-241-138/+95
* Added Cannonlake processor to X86 TargetElena Demikhovsky2016-01-181-1/+37
* [AVX512] adding AVXVBMI feature flagMichael Zuckerman2016-01-171-0/+4
* [X86] Remove declaration of ATTAsmParser. Its equivalent to the DefaultAsmPar...Craig Topper2015-12-291-5/+0
* [x86] adding PKU feature flagAsaf Badouh2015-12-151-0/+3
* Add FeatureLAHFSAHF to amdfam10 as well.Hans Wennborg2015-12-041-1/+1
* X86: Don't emit SAHF/LAHF for 64-bit targets unless explicitly supportedHans Wennborg2015-12-041-19/+39
* Add MMX to the 3dnow enum and propagate changes around. This makesEric Christopher2015-11-141-6/+5
* [X86] Add fxsr feature flag for fxsave/fxrestore instructions.Craig Topper2015-10-161-32/+56
* Add XSAVE/XSAVEOPT to KNL processor.Craig Topper2015-10-151-0/+2
* [X86] Add XSAVE feature flags to their various processors.Craig Topper2015-10-141-3/+23
* fix capitalization; NFCSanjay Patel2015-10-121-2/+2
* [X86] Add XSAVE intrinsic familyAmjad Aboud2015-10-121-0/+12
* Move the MMX subtarget feature out of the SSE set of features and intoEric Christopher2015-10-081-164/+290
* rename "slow-unaligned-mem-under-32" to slow-unaligned-mem-16" (NFCI)Sanjay Patel2015-09-011-43/+47
* remove 'FeatureSlowUAMem' from AMD CPUs based on 10H micro-arch or laterSanjay Patel2015-08-211-11/+7
* [x86] invert logic for attribute 'FeatureFastUAMem'Sanjay Patel2015-08-211-77/+79
* [X86] Add ADX and RDSEED to Skylake processor.Craig Topper2015-08-081-1/+2
* Add SlowBTMem to Sandy Bridge and newer Intel CPUs. Reading through Agner Fog...Craig Topper2015-08-081-5/+9
* Avoid using uncommon acronym "MSROM".Sean Silva2015-07-271-2/+2
* [X86] Allow load folding into PUSH instructionsMichael Kuperstein2015-07-231-0/+5
* make reciprocal estimate code generation more flexible by adding command-line...Sanjay Patel2015-06-041-5/+1
* X86: Added MPX feature and bound registers.Elena Demikhovsky2015-06-031-2/+4
* Revert "make reciprocal estimate code generation more flexible by adding comm...Rafael Espindola2015-06-031-1/+5
* make reciprocal estimate code generation more flexible by adding command-line...Sanjay Patel2015-06-021-5/+1
* Revert "make reciprocal estimate code generation more flexible by adding comm...Rafael Espindola2015-05-231-1/+5
* make reciprocal estimate code generation more flexible by adding command-line...Sanjay Patel2015-05-221-5/+1
* Migrate existing backends that care about software floating pointEric Christopher2015-05-121-0/+3
* [X86] Remove FeatureAES for 'corei7' CPU. 'corei7' should match 'nehalem' whi...Craig Topper2015-03-301-11/+9
* [X86] Remove two feature flags that covered sets of instructions that have no...Craig Topper2015-02-051-6/+1
* Fix program crashes due to alignment exceptions generated for SSE memop instr...Sanjay Patel2015-02-031-9/+5
* X86: Added FeatureVectorUAMem for all AVX architectures.Elena Demikhovsky2014-12-161-2/+6
* [x86] Fix the test to actually test things for the CPU names, add theChandler Carruth2014-12-091-0/+4
* [x86] Bring some sanity to the x86 CPU processor definitions.Chandler Carruth2014-12-091-61/+139
* [X86] Clean up whitespace as well as minor coding styleMichael Liao2014-12-041-2/+2
* Enable FeatureFastUAMem for btver2Sanjay Patel2014-11-281-2/+8
* Add a feature flag for slow 32-byte unaligned memory accesses [x86].Sanjay Patel2014-11-211-3/+8
* [X86] For Silvermont CPU use 16-bit division instead of 64-bit for small posi...Alexey Volkov2014-11-211-4/+8
* [X86] Use ADD/SUB instead of INC/DEC for Haswell and Broadwell CPUsAlexey Volkov2014-11-171-2/+3
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