| Commit message (Collapse) | Author | Age | Files | Lines |
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All CVS history was renamed, the *,v were copied over. No worries.
llvm-svn: 15238
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- Replace ConstantPointerRef usage with GlobalValue usage
- Minimize redundant isa<GlobalValue> usage
- Correct isa<Constant> for GlobalValue subclass
llvm-svn: 14950
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llvm-svn: 14483
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llvm-svn: 14482
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MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function.
llvm-svn: 14389
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llvm-svn: 14201
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llvm-svn: 13952
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Get rid of separate numbering for LLVM BasicBlocks; use the automatically
generated MachineBasicBlock numbering.
llvm-svn: 13567
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llvm-svn: 12893
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I/O port instructions on x86. The specific code sequence is tailored to
the parameters and return value of the intrinsic call.
Added the ability for implicit defintions to be printed in the Instruction
Printer.
Added the ability for RawFrm instruction to print implict uses and
defintions with correct comma output. This required adjustment to some
methods so that a leading comma would or would not be printed.
llvm-svn: 12782
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llvm-svn: 12575
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llvm-svn: 12289
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instructions.
llvm-svn: 12258
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llvm-svn: 12253
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llvm-svn: 12064
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their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:
ADD8rr -> add, 8-bit register, 8-bit register
IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate
IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate
MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory
llvm-svn: 11995
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denote this fact.
llvm-svn: 11971
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the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).
llvm-svn: 11967
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llvm-svn: 11921
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llvm-svn: 11729
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llvm-svn: 11537
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llvm-svn: 11527
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instructions. Add forms of these instructions that read from memory
llvm-svn: 11518
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MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.
Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.
llvm-svn: 11477
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llvm-svn: 11445
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ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
llvm-svn: 11340
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llvm-svn: 11332
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operand of the instruction and thus simplify the register allocation.
llvm-svn: 11124
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to be the same (IOW they are not two address instructions).
llvm-svn: 11117
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It's not clear why the code was looking for signed chars < 0, but it can't
matter to the assembler anyway, so the check goes away.
llvm-svn: 10853
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a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
llvm-svn: 10461
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llvm-svn: 10274
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the other way around, instead of failing a large, tumor-like assertion.
llvm-svn: 10171
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llvm-svn: 9903
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llvm-svn: 9694
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build up
strings with the stuff that used to print to an ostream directly. We now NEVER build
up big strings, only to print them once they are formed.
llvm-svn: 9686
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llvm-svn: 9684
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* Emit bools as 1/0 instead of true/false, fixing compilation of eon and
PR 83 & Jello/2003-11-03-GlobalBool.llx
llvm-svn: 9683
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Header files will be on the way.
llvm-svn: 9298
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llvm-svn: 9280
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* Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an
extra copy into a register, reducing register pressure.
llvm-svn: 9278
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This fixes PR#44.
llvm-svn: 9252
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llvm-svn: 9171
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llvm-svn: 8892
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llvm-svn: 8452
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into the struct case.
* Extend printConstantValueOnly to print .zero's if the initializer is zero
* Delete dead isConstantFunctionPointerRef function
* Emit the appropriate assembly for the various linkage types!
llvm-svn: 8417
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Revert (to v1.55) one of the hunks of Chris's change that messed up the
%-register workaround.
llvm-svn: 7815
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llvm-svn: 7746
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llvm-svn: 7745
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consumably by the cygwin assembler. This is really just a nasty hack until we
get real target triple support.
llvm-svn: 7742
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