summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/InstPrinter
Commit message (Collapse)AuthorAgeFilesLines
...
* [x86] Allow address-size overrides for STOS[BWLQ] (PR9385)David Woodhouse2014-01-224-0/+49
| | | | llvm-svn: 199804
* [x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)David Woodhouse2014-01-224-0/+64
| | | | llvm-svn: 199803
* To allow the X86 verbose assembly to print its informative commentsKevin Enderby2014-01-211-44/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when used with symbolic disassembly, add a check that the operand is an immediate and has not been symbolicated to MCExpr operand. I’m trying to enable the ‘C’ disassembly API option LLVMDisassembler_Option_SetInstrComments for darwin’s otool(1) that uses the llvm disassembler API. The problem is that the disassembler API can change an immediate operand to an MCExpr operand if it symbolicates it with the call backs. And if it does the code in llvm::EmitAnyX86InstComments() will crash when it assumes these operands are immediates. The fix for this is very straight forward to just protect the call to getImm() with a check of isImm(). So if the immediate for an instruction is symbolicated it simply doesn’t get the X86 verbose assembly comments: % otool -tV test_asm.o test_asm.o: (__TEXT,__text) section _t1: 0000000000000000 vpshufd $_t1, %xmm1, %xmm0 0000000000000005 retq 0000000000000006 nopw %cs:_t1(%rax,%rax) _t2: 0000000000000010 vpshufd $-0x1, %xmm0, %xmm0 ## xmm0 = xmm0[3,3,3,3] 0000000000000015 retq 0000000000000016 nopw %cs:_t1(%rax,%rax) _t3: 0000000000000020 vpshufd $_t1, %xmm1, %xmm0 0000000000000025 retq 0000000000000026 nopw %cs:_t1(%rax,%rax) _t4: 0000000000000030 vpshufd $0x2d, %xmm0, %xmm0 ## xmm0 = xmm0[1,3,2,0] 0000000000000035 retq The fact that the immediate $0x0 is being symbolicated at all in this case is a different problem which my next patch will address. rdar://10989286 llvm-svn: 199697
* Allow x86 mov instructions to/from memory with absolute address to be ↵Craig Topper2014-01-162-0/+14
| | | | | | encoded and disassembled with a segment override prefix. Fixes PR16962. llvm-svn: 199364
* AVX-512: Embedded Rounding Control - encoding and printingElena Demikhovsky2014-01-132-6/+2
| | | | | | Changed intrinsics for vrcp14/vrcp28 vrsqrt14/vrsqrt28 - aligned with GCC. llvm-svn: 199102
* AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmpElena Demikhovsky2014-01-014-0/+27
| | | | | | | Printing rounding control. Enncoding for EVEX_RC (rounding control). llvm-svn: 198277
* [CMake] Let add_public_tablegen_target responsible to provide dependency to ↵NAKAMURA Takumi2013-11-281-2/+0
| | | | | | | | | CommonTableGen. add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS. LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope. llvm-svn: 195927
* [CMake] Prune include_directories() in llvm/lib/Target, take #2.NAKAMURA Takumi2013-11-281-2/+0
| | | | | | I forgot to commit them. They were staging in my local repo. llvm-svn: 195924
* First round of fixes for the x86 fixes for the x86 move accumulator from/to ↵Craig Topper2013-08-254-2/+66
| | | | | | | | | | | | | | memory offset instructions. -Assembly parser now properly check the size of the memory operation specified in intel syntax. So 'mov word ptr [5], al' is no longer accepted. -x86-32 disassembly of these instructions no longer sign extends the 32-bit address immediate based on size. -Intel syntax printing prints the ptr size and places brackets around the address immediate. Known remaining issues with these instructions: -Segment override prefix is not supported. PR16962 and PR16961. -Immediate size should be changed by address size prefix. llvm-svn: 189201
* Fixed the Intel-syntax X86 disassembler to respect the (existing) option for ↵Daniel Malea2013-08-012-7/+5
| | | | | | | | | hexadecimal immediates, to match AT&T syntax. This also brings a new option for C-vs-MASM-style hex. Patch by Richard Mitton Reviewed: http://llvm-reviews.chandlerc.com/D1243 llvm-svn: 187614
* Changed register names (and pointer keywords) to be lower case when using ↵Craig Topper2013-07-312-20/+15
| | | | | | | | Intel X86 assembler syntax. Patch by Richard Mitton. llvm-svn: 187476
* Remove trailing whitespace and some tab characters.Craig Topper2013-07-311-9/+9
| | | | llvm-svn: 187472
* Added encoding prefixes for KNL instructions (EVEX).Elena Demikhovsky2013-07-282-0/+14
| | | | | | | Added 512-bit operands printing. Added instruction formats for KNL instructions. llvm-svn: 187324
* Merge SSE and AVX shuffle instructions in the comment printer.Craig Topper2013-01-291-98/+14
| | | | llvm-svn: 173777
* Add missing break in 256-bit palignr comment printing. No test case yet ↵Craig Topper2013-01-281-0/+1
| | | | | | because the comment itself is still wrong. llvm-svn: 173669
* Fix inconsistent usage of PALIGN and PALIGNR when referring to the same ↵Craig Topper2013-01-281-6/+6
| | | | | | instruction. llvm-svn: 173667
* X86: Decode PALIGN operands so I don't have to do it in my head.Benjamin Kramer2013-01-261-0/+22
| | | | llvm-svn: 173572
* Added a option to the disassembler to print immediates as hex.Kevin Enderby2012-12-051-4/+4
| | | | | | | | | | | | | | | | | | | | This is for the lldb team so most of but not all of the values are to be printed as hex with this option. Some small values like the scale in an X86 address were requested to printed in decimal without the leading 0x. There may be some tweaks need to places that may still be in decimal that they want in hex. Specially for arm. I made my best guess. Any tweaks from here should be simple. I also did the best I know now with help from the C++ gurus creating the cleanest formatImm() utility function and containing the changes. But if someone has a better idea to make something cleaner I'm all ears and game for changing the implementation. rdar://8109283 llvm-svn: 169393
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-032-4/+4
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Make branch heavy code for generating marked up disassembly simplerKevin Enderby2012-10-231-30/+16
| | | | | | | and easier to read by adding a couple helper functions. Suggestion by Chandler Carruth and seconded by Meador Inge! llvm-svn: 166515
* Add support for annotated disassembly output for X86 and arm.Kevin Enderby2012-10-221-2/+30
| | | | | | | | | | | Per the October 12, 2012 Proposal for annotated disassembly output sent out by Jim Grosbach this set of changes implements this for X86 and arm. The llvm-mc tool now has a -mdis option to produced the marked up disassembly and a couple of small example test cases have been added. rdar://11764962 llvm-svn: 166445
* Separate AVXCC and SSECC printing for cmpps/pd/ss/sd and add masking before ↵Craig Topper2012-10-094-3/+54
| | | | | | the switch statement. This keeps the unreachable default case from being hit if the instruction was created with an intrinsic with too large of an immediate. llvm-svn: 165483
* Typos.Chad Rosier2012-10-032-5/+4
| | | | llvm-svn: 165141
* Add 'lock' prefix output support in assembly printerMichael Liao2012-09-262-0/+14
| | | | | | | | - Instead of embedding 'lock' into each mnemonic of atomic instructions except 'xchg', we teach X86 assembly printer to output 'lock' prefix similar to or consistent with code emitter. llvm-svn: 164659
* Update function names to conform to guidelines. No functional change intended.Chad Rosier2012-09-104-8/+8
| | | | llvm-svn: 163561
* Add shuffle decode support for VPERMQ/VPERMPD.Craig Topper2012-05-061-0/+10
| | | | llvm-svn: 156265
* Add support for selecting AVX2 vpshuflw and vpshufhw. Add decoding support ↵Craig Topper2012-05-021-2/+22
| | | | | | for AsmPrinter. llvm-svn: 155982
* Move getOpcodeName from the various target InstPrinters into the superclass ↵Benjamin Kramer2012-04-024-9/+0
| | | | | | | | MCInstPrinter. All implementations used the same code. llvm-svn: 153866
* Remove getInstructionName from MCInstPrinter implementations in favor of ↵Craig Topper2012-04-024-8/+4
| | | | | | using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. llvm-svn: 153863
* Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ↵Craig Topper2012-04-022-4/+6
| | | | | | getInstructionName and the static data it contains since the same tables are already in MCInstrInfo. llvm-svn: 153860
* Rip out emission of the regIsInRegClass function for the asm printer.Benjamin Kramer2012-03-301-0/+1
| | | | | | It's slow, bloated and completely redundant with MCRegisterClass::contains. llvm-svn: 153782
* Use a signed value for this enum to avoid spuriuos warnings from gcc.Benjamin Kramer2012-03-211-1/+1
| | | | llvm-svn: 153184
* Factor out target shuffle mask decoding from getShuffleScalarElt and use a ↵Craig Topper2012-03-201-5/+5
| | | | | | SmallVector of int instead of unsigned for shuffle mask in decode functions. Preparation for another change. llvm-svn: 153079
* Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-053-8/+5
| | | | | | | Used to allow context sensitive printing of super-register or sub-register references. llvm-svn: 152043
* Updated the llvm-mc disassembler C API to support for the X86 target.Kevin Enderby2012-02-232-11/+34
| | | | | | | | | | | | | | | | | | | | | rdar://10873652 As part of this I updated the llvm-mc disassembler C API to always call the SymbolLookUp call back even if there is no getOpInfo call back. If there is a getOpInfo call back that is tried first and then if that gets no information then the SymbolLookUp is called. I also made the code more robust by memset(3)'ing to zero the LLVMOpInfo1 struct before then setting SymbolicOp.Value before for the call to getOpInfo. And also don't use any values from the LLVMOpInfo1 struct if getOpInfo returns 0. And also don't use any of the ReferenceType or ReferenceName values from SymbolLookUp if it returns NULL. rdar://10873563 and rdar://10873683 For the X86 target also fixed bugs so the annotations get printed. Also fixed a few places in the ARM target that was not producing symbolic operands for some instructions. rdar://10878166 llvm-svn: 151267
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-183-3/+3
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Fixed a bug in printing "cmp" pseudo ops.Elena Demikhovsky2012-02-082-16/+65
| | | | | | | | | | | | | | | | | | | | | | > This IR code > %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 14) > fails with assertion: > > llc: X86ATTInstPrinter.cpp:62: void llvm::X86ATTInstPrinter::printSSECC(const llvm::MCInst*, unsigned int, llvm::raw_ostream&): Assertion `0 && "Invalid ssecc argument!"' failed. > 0 llc 0x0000000001355803 > 1 llc 0x0000000001355dc9 > 2 libpthread.so.0 0x00007f79a30575d0 > 3 libc.so.6 0x00007f79a23a1945 gsignal + 53 > 4 libc.so.6 0x00007f79a23a2f21 abort + 385 > 5 libc.so.6 0x00007f79a239a810 __assert_fail + 240 > 6 llc 0x00000000011858d5 llvm::X86ATTInstPrinter::printSSECC(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) + 119 I added the full testing for all possible pseudo-ops of cmp. I extended X86AsmPrinter.cpp and X86IntelInstPrinter.cpp. You'l also see lines alignments (unrelated to this fix) in X86IselLowering.cpp from my previous check-in. llvm-svn: 150068
* Add shuffle decoding support for 256-bit pshufd. Merge vpermilp* and pshufd ↵Craig Topper2012-02-061-9/+20
| | | | | | decoding. llvm-svn: 149859
* Convert assert(0) to llvm_unreachable in X86 Target directory.Craig Topper2012-02-052-2/+2
| | | | llvm-svn: 149809
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-121-1/+0
| | | | llvm-svn: 146409
* Clean up some of the shuffle decoding code for UNPCK instructions. Add ↵Craig Topper2011-12-061-20/+148
| | | | | | instruction commenting for AVX/AVX2 forms for integer UNPCKs. llvm-svn: 145924
* Merge decoding of VPERMILPD and VPERMILPS shuffle masks. Merge X86ISD node ↵Craig Topper2011-11-301-8/+8
| | | | | | type for VPERMILPD/PS. Add instruction selection support for VINSERTI128/VEXTRACTI128. llvm-svn: 145483
* build/CMake: Finish removal of add_llvm_library_dependencies.Daniel Dunbar2011-11-291-6/+0
| | | | llvm-svn: 145420
* Fix shuffle decoding for memory forms for (V)SHUFPS/D.Craig Topper2011-11-291-6/+12
| | | | llvm-svn: 145392
* Fix issues in shuffle decoding around VPERM* instructions. Fix shuffle ↵Craig Topper2011-11-291-14/+48
| | | | | | decoding for VSHUFPS/D for 256-bit types. Add pattern matching for memory forms of VPERMILPS/VPERMILPD. llvm-svn: 145390
* More fixes to the X86InstComments for shuffle instructions. In particular ↵Craig Topper2011-11-221-12/+60
| | | | | | add AVX flavors of many instructions and fix the destination operand for some of the existing AVX entries. llvm-svn: 145063
* Fix shuffle decoding logic to handle UNPCKLPS/UNPCKLPD on 256-bit vectors ↵Craig Topper2011-11-221-2/+30
| | | | | | correctly. Add support for decoding UNPCKHPS/UNPCKHPD for AVX 128-bit and 256-bit forms. llvm-svn: 145055
* Add more PRI.64 macros for MSVC and use them throughout the codebase.Benjamin Kramer2011-11-051-1/+1
| | | | llvm-svn: 143799
* build: Add initial cut at LLVMBuild.txt files.Daniel Dunbar2011-11-031-0/+24
| | | | llvm-svn: 143634
* In the disassembler C API, be careful not to confuse the comment streamer ↵Owen Anderson2011-09-212-2/+2
| | | | | | that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on. llvm-svn: 140217
OpenPOWER on IntegriCloud