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path: root/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
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* Eliminated the classification of control registers into %ecr_Sean Callanan2010-05-061-2/+1
| | | | | | | | | and %rcr_, leaving just %cr_ which is what people expect. Updated the disassembler to support this unified register set. Added a testcase to verify that the registers continue to be decoded correctly. llvm-svn: 103196
* Fixed a bug where the disassembler would allow an immediateSean Callanan2010-04-071-0/+1
| | | | | | | | | argument that had to be between 0 and 7 to have any value, firing an assert later in the AsmPrinter. Now, the disassembler rejects instructions with out-of-range values for that immediate. llvm-svn: 100694
* Fixes to the X86 disassembler:Sean Callanan2009-12-221-0/+1
| | | | | | | | Made LEA memory operands emit only 4 MCInst operands. Made the scale operand equal 1 for instructions that have no SIB byte. llvm-svn: 91919
* Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit Sean Callanan2009-12-191-0/+354
incarnations), integrated into the MC framework. The disassembler is table-driven, using a custom TableGen backend to generate hierarchical tables optimized for fast decode. The disassembler consumes MemoryObjects and produces arrays of MCInsts, adhering to the abstract base class MCDisassembler (llvm/MC/MCDisassembler.h). The disassembler is documented in detail in - lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime) - utils/TableGen/DisassemblerEmitter.cpp (table emitter) You can test the disassembler by running llvm-mc -disassemble for i386 or x86_64 targets. Please let me know if you encounter any problems with it. llvm-svn: 91749
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