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* Revert "[WebAssembly] Emit type signatures for declared functions"Derek Schuff2016-06-023-50/+10
| | | | | | | | This reverts r271599, it broke the integration tests. More places than I expected had nontrival return types in imports, or else the check was wrong. llvm-svn: 271606
* [WebAssembly] Emit type signatures for declared functionsDerek Schuff2016-06-023-10/+50
| | | | | | | | | | | | | | | | | Under emscripten, C code can take the address of a function implemented in Javascript (which is exposed via an import in wasm). Because imports do not have linear memory address in wasm, we need to generate a thunk to be the target of the indirect call; it call the import directly. To make this possible, LLVM needs to emit the type signatures for these functions, because they may not be called directly or referred to other than where the address is taken. This uses s new .s directive (.functype) which specifies the signature. Differential Revision: http://reviews.llvm.org/D20891 llvm-svn: 271599
* [WebAssembly] Put __stack_pointer in the offset field of loads and stores.Dan Gohman2016-05-241-10/+10
| | | | | | | | | | | | | | | | | | | | Instead of this: i32.const $push10=, __stack_pointer i32.load $push11=, 0($pop10) Emit this: i32.const $push10=, 0 i32.load $push11=, __stack_pointer($pop10) It's not currently clear which is better, though there's a chance the second form may be better at overall compression. We can revisit this when we have more data; for now it makes sense to make PEI consistent with isel. Differential Revision: http://reviews.llvm.org/D20411 llvm-svn: 270635
* [WebAssembly] Basic TargetTransformInfo support for SIMD128.Dan Gohman2016-05-232-1/+65
| | | | llvm-svn: 270508
* [WebAssembly] Speed up LiveIntervals updating.Dan Gohman2016-05-231-6/+9
| | | | | | | | Use the more specific LiveInterval::removeSegment instead of LiveInterval::shrinkToUses when we know the specific range that's being removed. llvm-svn: 270463
* [WebAssembly] Optimize away return instructions using fallthroughs.Dan Gohman2016-05-216-10/+111
| | | | | | | | | This saves a small amount of code size, and is a first small step toward passing values on the stack across block boundaries. Differential Review: http://reviews.llvm.org/D20450 llvm-svn: 270294
* [WebAssembly] Simplify code that never has to handle physical registers. NFC.Dan Gohman2016-05-191-9/+2
| | | | llvm-svn: 270137
* [WebAssembly] Update WebAssembly target for r269988.Dan Gohman2016-05-192-4/+11
| | | | llvm-svn: 270017
* [WebAssembly] Disable the MachineScheduler.Dan Gohman2016-05-182-1/+14
| | | | llvm-svn: 269976
* [WebAssembly] Don't expand divisions by constants.Dan Gohman2016-05-182-0/+7
| | | | | | | Don't expand divisions by constants if it would require multiple instructions. The current assumption is that engines will perform the desired optimizations. llvm-svn: 269930
* [WebAssembly] Rename $discard to $drop in the assembly output.Dan Gohman2016-05-174-13/+12
| | | | llvm-svn: 269862
* [WebAssembly] Model the stack evaluation order more precisely.Dan Gohman2016-05-171-20/+40
| | | | | | | | | | | We currently don't represent get_local and set_local explicitly; they are just implied by virtual register use and def. This avoids a lot of clutter, but it does complicate stackifying: get_locals read their operands at their position in the stack evaluation order, rather than at their parent instruction. This patch adds code to walk the stack to determine the precise ordering, when needed. llvm-svn: 269854
* [WebAssembly] Don't stackify calls past stack pointer modifications.Dan Gohman2016-05-172-20/+41
| | | | llvm-svn: 269843
* [WebAssembly] Stackify induction variable increment instructions.Dan Gohman2016-05-171-28/+65
| | | | | | | This handles instructions where the defined register is also used, as in "x = x + 1". llvm-svn: 269830
* [WebAssembly] Remove our copy of PrologEpilogInserterDerek Schuff2016-05-173-1060/+0
| | | | | | It's no longer needed after r269750 llvm-svn: 269756
* Factor PrologEpilogInserter around spilling, frame finalization, and scavengingDerek Schuff2016-05-172-8/+2
| | | | | | | | | | | | | | | PrologEpilogInserter has these 3 phases, which are related, but not all of them are needed by all targets. This patch reorganizes PEI's varous functions around those phases for more clear separation. It also introduces a new TargetMachine hook, usesPhysRegsForPEI, which is true for non-virtual targets. When it is true, all the phases operate as before, and PEI requires the AllVRegsAllocated property on MachineFunctions. Otherwise, CSR spilling and scavenging are skipped and only prolog/epilog insertion/frame finalization is done. Differential Revision: http://reviews.llvm.org/D18366 llvm-svn: 269750
* [WebAssembly] Improve the precision of memory and side effect dependence ↵Dan Gohman2016-05-171-23/+192
| | | | | | | | | | tracking. MachineInstr::isSafeToMove is more conservative than is needed here; use a more explicit check, and incorporate knowledge of some WebAssembly-specific opcodes. llvm-svn: 269736
* [WebAssembly] Mark COPY_LOCAL and TEE_LOCAL instructions has having no side ↵Dan Gohman2016-05-161-0/+2
| | | | | | effects. llvm-svn: 269683
* [WebAssembly] Use eqz to negate a branch conditions.Dan Gohman2016-05-161-8/+2
| | | | llvm-svn: 269681
* [WebAssembly] Add a few optimization ideas to README.txt.Dan Gohman2016-05-161-0/+15
| | | | llvm-svn: 269677
* [WebAssembly] Fix legalization of i128 shifts.Dan Gohman2016-05-141-9/+4
| | | | | | | | compiler-rt/libgcc shift routines expect the shift count to be an i32, so use i32 as the shift count for shifts that are legalized to libcalls. This also reverts r268991, now that the signatures are correct. llvm-svn: 269531
* [WebAssembly] Update expected torture test failuresDerek Schuff2016-05-141-2/+2
| | | | | | NFC; the waterfall just changed the way they are built. llvm-svn: 269523
* SDAG: Implement Select instead of SelectImpl in WebAssemblyDAGToDAGISelJustin Bogner2016-05-131-14/+4
| | | | | | | | | This backend doesn't do anything custom here yet, so we just modernize the boilerplate. Part of llvm.org/pr26808. llvm-svn: 269506
* [WebAssembly] Fast-isel support for calls, arguments, and selects.Dan Gohman2016-05-123-55/+331
| | | | llvm-svn: 269273
* [WebAssembl] Implement enough of fast-isel to run the comparison tests.Dan Gohman2016-05-111-98/+389
| | | | llvm-svn: 269203
* [WebAssembly] Preliminary fast-isel support.Dan Gohman2016-05-101-4/+542
| | | | llvm-svn: 269083
* [WebAssembly] Move register stackification and coloring to a late phase.Dan Gohman2016-05-1014-249/+577
| | | | | | | | | | | | | | | | | | | Move the register stackification and coloring passes to run very late, after PEI, tail duplication, and most other passes. This means that all code emitted and expanded by those passes is now exposed to these passes. This also eliminates the need for prologue/epilogue code to be manually stackified, which significantly simplifies the code. This does require running LiveIntervals a second time. It's useful to think of these late passes not as late optimization passes, but as a domain-specific compression algorithm based on knowledge of liveness information. It's used to compress the code after all conventional optimizations are complete, which is why it uses LiveIntervals at a phase when actual optimization passes don't typically need it. Differential Revision: http://reviews.llvm.org/D20075 llvm-svn: 269012
* CodeGen: Move TargetPassConfig from Passes.h to an own header; NFCMatthias Braun2016-05-101-0/+1
| | | | | | | | Many files include Passes.h but only a fraction needs to know about the TargetPassConfig class. Move it into an own header. Also rename Passes.cpp to TargetPassConfig.cpp while we are at it. llvm-svn: 269011
* [WebAssembly] Disable 128-bit shift libcallsDerek Schuff2016-05-101-0/+7
| | | | | | | | Currently the signature of the functions i128(i128, i32) aka void(i32, i64, i64, i32) doesn't match the signature of the call emitted by the default lowering, void(i32, i64, i64). llvm-svn: 268991
* SDAG: Rename Select->SelectImpl and repurpose Select as returning voidJustin Bogner2016-05-051-2/+2
| | | | | | | | | | | | | | This is a step towards removing the rampant undefined behaviour in SelectionDAG, which is a part of llvm.org/PR26808. We rename SelectionDAGISel::Select to SelectImpl and update targets to match, and then change Select to return void and consolidate the sketchy behaviour we're trying to get away from there. Next, we'll update backends to implement `void Select(...)` instead of SelectImpl and eventually drop the base Select implementation. llvm-svn: 268693
* [WebAssembly] Don't emit epilogue code in the middle of stackified code.Dan Gohman2016-05-052-1/+10
| | | | llvm-svn: 268679
* [WebAssembly] Rename memory_size intrinsic to current_memoryDerek Schuff2016-05-021-9/+9
| | | | | | This follows the recent renaming in the wasm spec. llvm-svn: 268255
* [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in ↵Craig Topper2016-04-281-1/+1
| | | | | | TargetLoweringBase. This is what the majority of the targets want and removes a bunch of code. Set it to Legal explicitly in the few cases where that's the desired behavior. llvm-svn: 267853
* [WebAssembly] Account for implicit operands when computing operand indices.Dan Gohman2016-04-261-1/+1
| | | | llvm-svn: 267511
* [WebAssembly] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG ↵Craig Topper2016-04-232-7/+1
| | | | | | will convert them to ctlz/cttz. Remove the now unneccessary isel patterns. NFC llvm-svn: 267264
* [WebAssembly] Limit alignment hints to natural alignment.Dan Gohman2016-04-211-3/+9
| | | | | | This follows the current binary format rules. llvm-svn: 267082
* Disable the PatchableFunction pass for NVPTX & WasmSanjoy Das2016-04-191-0/+1
| | | | | | | PatchableFunction requires AllVRegsAllocated that these targets don't provide. llvm-svn: 266720
* Include SmallVector.h header in ↵Eric Liu2016-04-181-0/+1
| | | | | | lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.h llvm-svn: 266606
* [NFC] Header cleanupMehdi Amini2016-04-185-6/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* RegisterScavenger: Take a reference as enterBasicBlock() argument.Matthias Braun2016-04-061-2/+2
| | | | | | | Make it obvious that the argument cannot be nullptr. Remove an unnecessary nullptr check in initRegState. llvm-svn: 265511
* Change eliminateCallFramePseudoInstr() to return an iteratorHans Wennborg2016-03-313-13/+5
| | | | | | | | | | | | | | | | | | | | | This will become necessary in a subsequent change to make this method merge adjacent stack adjustments, i.e. it might erase the previous and/or next instruction. It also greatly simplifies the calls to this function from Prolog- EpilogInserter. Previously, that had a bunch of logic to resume iteration after the call; now it just continues with the returned iterator. Note that this changes the behaviour of PEI a little. Previously, it attempted to re-visit the new instruction created by eliminateCallFramePseudoInstr(). That code was added in r36625, but I can't see any reason for it: the new instructions will obviously not be pseudo instructions, they will not have FrameIndex operands, and we have already accounted for the stack adjustment. Differential Revision: http://reviews.llvm.org/D18627 llvm-svn: 265036
* [WebAssembly] Remove duplicate disabling of passesDerek Schuff2016-03-281-12/+6
| | | | | | Also put all the disabled passes together llvm-svn: 264684
* Introduce MachineFunctionProperties and the AllVRegsAllocated propertyDerek Schuff2016-03-281-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | MachineFunctionProperties represents a set of properties that a MachineFunction can have at particular points in time. Existing examples of this idea are MachineRegisterInfo::isSSA() and MachineRegisterInfo::tracksLiveness() which will eventually be switched to use this mechanism. This change introduces the AllVRegsAllocated property; i.e. the property that all virtual registers have been allocated and there are no VReg operands left. With this mechanism, passes can declare that they require a particular property to be set, or that they set or clear properties by implementing e.g. MachineFunctionPass::getRequiredProperties(). The MachineFunctionPass base class verifies that the requirements are met, and handles the setting and clearing based on the delcarations. Passes can also directly query and update the current properties of the MF if they want to have conditional behavior. This change annotates the target-independent post-regalloc passes; future changes will also annotate target-specific ones. Reviewers: qcolombet, hfinkel Differential Revision: http://reviews.llvm.org/D18421 llvm-svn: 264593
* [WebAssembly] Implement the rotate instructions.Dan Gohman2016-03-222-1/+9
| | | | llvm-svn: 264076
* [WebAssembly] Implement the eqz instructions.Dan Gohman2016-03-211-0/+7
| | | | llvm-svn: 263976
* [WebAssembly] Stackify code emitted by eliminateFrameIndex and SP writebackDerek Schuff2016-03-172-19/+85
| | | | | | | | | | | | | | | | | Summary: MRI::eliminateFrameIndex can emit several instructions to do address calculations; these can usually be stackified. Because instructions with FI operands can have subsequent operands which may be expression trees, find the top of the leftmost tree and insert the code before it, to keep the LIFO property. Also use stackified registers when writing back the SP value to memory in the epilog; it's unnecessary because SP will not be used after the epilog, and it results in better code. Differential Revision: http://reviews.llvm.org/D18234 llvm-svn: 263725
* Try to fix build of WebAssemblyRegStackify.cpp on WindowsHans Wennborg2016-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | It's failing to build on VS2015 with: C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\lib\Target\WebAssembly\WebAssemblyRegStackify.cpp(520): error C2668: 'llvm::make_reverse_iterator': ambiguous call to overloaded function C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\include\llvm/ADT/STLExtras.h(217): note: could be 'std::reverse_iterator<llvm::MachineBasicBlock::iterator> llvm::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(IteratorTy)' with [ IteratorTy=llvm::MachineInstrBundleIterator<llvm::MachineInstr> ] C:\b\depot_tools\win_toolchain\vs_files\391bbf1220d3edcd3cc3fccdb56224181e3b13a7\win_sdk\bin\..\..\VC\include\xutility(1217): note: or 'std::reverse_iterator<llvm::MachineBasicBlock::iterator> std::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(_RanIt)' [found using argument-dependent lookup] with [ _RanIt=llvm::MachineInstrBundleIterator<llvm::MachineInstr> ] I don't have VS2015 locally at the moment, but hopefully this will help. llvm-svn: 263418
* [WebAssembly] Add `final` keywords to a few more subclasses, for consistency.Dan Gohman2016-03-112-2/+2
| | | | llvm-svn: 263287
* [WebAssembly] Update known gcc test failuresDerek Schuff2016-03-091-3/+0
| | | | llvm-svn: 263068
* [WebAssembly] Update comments about irreducible control flow.Dan Gohman2016-03-092-8/+13
| | | | llvm-svn: 262995
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