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* Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"Matthias Braun2017-10-121-4/+5
| | | | | | | | | | Reverting to investigate layering effects of MCJIT not linking libCodeGen but using TargetMachine::getNameWithPrefix() breaking the lldb bots. This reverts commit r315633. llvm-svn: 315637
* TargetMachine: Merge TargetMachine and LLVMTargetMachineMatthias Braun2017-10-121-5/+4
| | | | | | | | | | | | | | | Merge LLVMTargetMachine into TargetMachine. - There is no in-tree target anymore that just implements TargetMachine but not LLVMTargetMachine. - It should still be possible to stub out all the various functions in case a target does not want to use lib/CodeGen - This simplifies the code and avoids methods ending up in the wrong interface. Differential Revision: https://reviews.llvm.org/D38489 llvm-svn: 315633
* Fix WebAssembly target after r309911.Daniel Jasper2017-08-031-2/+2
| | | | llvm-svn: 309922
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
* TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFCMatthias Braun2017-05-301-2/+2
| | | | | | | | | | | TargetPassConfig is not useful for targets that do not use the CodeGen library, so we may just as well store a pointer to an LLVMTargetMachine instead of just to a TargetMachine. While at it, also change the constructor to take a reference instead of a pointer as the TM must not be nullptr. llvm-svn: 304247
* [LegacyPassManager] Remove TargetMachine constructorsFrancis Visoiu Mistrih2017-05-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This provides a new way to access the TargetMachine through TargetPassConfig, as a dependency. The patterns replaced here are: * Passes handling a null TargetMachine call `getAnalysisIfAvailable<TargetPassConfig>`. * Passes not handling a null TargetMachine `addRequired<TargetPassConfig>` and call `getAnalysis<TargetPassConfig>`. * MachineFunctionPasses now use MF.getTarget(). * Remove all the TargetMachine constructors. * Remove INITIALIZE_TM_PASS. This fixes a crash when running `llc -start-before prologepilog`. PEI needs StackProtector, which gets constructed without a TargetMachine by the pass manager. The StackProtector pass doesn't handle the case where there is no TargetMachine, so it segfaults. Related to PR30324. Differential Revision: https://reviews.llvm.org/D33222 llvm-svn: 303360
* [WebAssembly] Split CFG-sorting into its own pass. NFC.Dan Gohman2017-02-271-1/+5
| | | | | | | CFG sorting was already an independent algorithm from block/loop insertion; this change makes it more convenient to debug. llvm-svn: 296399
* [WebAssembly] Basic support for Wasm object file encoding.Dan Gohman2017-02-241-3/+13
| | | | | | | | | With the "wasm32-unknown-unknown-wasm" triple, this allows writing out simple wasm object files, and is another step in a larger series toward migrating from ELF to general wasm object support. Note that this code and the binary format itself is still experimental. llvm-svn: 296190
* [WebAssembly] Add skeleton MC support for the Wasm container formatDan Gohman2017-02-221-1/+5
| | | | | | | | | This just adds the basic skeleton for supporting a new object file format. All of the actual encoding will be implemented in followup patches. Differential Revision: https://reviews.llvm.org/D26722 llvm-svn: 295803
* [WebAssembly] Add a pass to create wrappers for function bitcasts.Dan Gohman2017-01-071-0/+4
| | | | | | | | | | | | WebAssembly requires caller and callee signatures to match exactly. In LLVM, there are a variety of circumstances where signatures may be mismatched in practice, and one can bitcast a function address to another type to call it as that type. This patch adds a pass which replaces bitcasted function addresses with wrappers to replace the bitcasts. This doesn't catch everything, but it does match many common cases. llvm-svn: 291315
* [WebAssembly] Eliminate an ad-hoc command-line argument.Dan Gohman2016-12-031-7/+1
| | | | | | | Use the target triple to determine whether to run the explicit-locals pass, rather than using a separate command-line argument. llvm-svn: 288602
* [WebAssembly] Add an option to make get_local/set_local explicit.Dan Gohman2016-10-241-0/+9
| | | | | | | | | | This patch adds a pass, controlled by an option and off by default for now, for making implicit get_local/set_local explicit. This simplifies emitting wasm with MC. Differential Revision: https://reviews.llvm.org/D25836 llvm-svn: 285009
* [WebAssembly] Fix for 0xc call_indirect changesDerek Schuff2016-10-211-0/+5
| | | | | | | | | | | | | | | | | Summary: Need to reorder the operands to have the callee as the last argument. Adds a pseudo-instruction, and a pass to lower it into a real call_indirect. This is the first of two options for how to fix the problem. Reviewers: dschuff, sunfish Subscribers: jfb, beanz, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D25708 llvm-svn: 284840
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-091-2/+4
| | | | | | | | This avoids "static initialization order fiasco" Differential Revision: https://reviews.llvm.org/D25412 llvm-svn: 283702
* [WebAssembly] Update to more stack-machine-oriented terminology.Dan Gohman2016-10-031-3/+3
| | | | | | | | WebAssembly has officially switched from being an AST to being a stack machine. Update various bits of terminology and README.md entries accordingly. llvm-svn: 283154
* [WebAssembly] Add asm.js-style setjmp/longjmp handling for wasm (reland r280302)Heejin Ahn2016-09-011-1/+13
| | | | | | | | | | | | Summary: This patch adds asm.js-style setjmp/longjmp handling support for WebAssembly. It also uses JavaScript's try and catch mechanism. Reviewers: jpp, dschuff Subscribers: jfb, dschuff Differential Revision: https://reviews.llvm.org/D24121 llvm-svn: 280415
* Revert "Add asm.js-style setjmp/longjmp handling for wasm"Heejin Ahn2016-09-011-8/+1
| | | | | | This reverts commit r280302, it broke the integration tests. llvm-svn: 280329
* Add asm.js-style setjmp/longjmp handling for wasmHeejin Ahn2016-08-311-1/+8
| | | | | | | | | | | | Summary: This patch adds asm.js-style setjmp/longjmp handling support for WebAssembly. It also uses JavaScript's try and catch mechanism. Reviewers: jpp, dschuff Subscribers: jfb, dschuff Differential Revision: https://reviews.llvm.org/D23928 llvm-svn: 280302
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* [WebAssembly] Refactor WebAssemblyLowerEmscriptenException pass for ↵Derek Schuff2016-08-181-4/+11
| | | | | | | | | | | | | | | | | | | | | | setjmp/longjmp This patch changes the code structure of WebAssemblyLowerEmscriptenException pass to support both exception handling and setjmp/longjmp. It also changes the name of the pass and the source file. 1. Change the file/pass name to WebAssemblyLowerEmscriptenExceptions -> WebAssemblyLowerEmscriptenEHSjLj to make it clear that it supports both EH and SjLj 2. List function / global variable names at the top so they can be changed easily 3. Some cosmetic changes Patch by Heejin Ahn Differential Revision: https://reviews.llvm.org/D23588 llvm-svn: 279075
* [WebAssembly] Fix bugs in WebAssemblyLowerEmscriptenExceptions passDerek Schuff2016-08-091-1/+1
| | | | | | | | | | | | | | | | | | * Delete extra '_' prefixes from JS library function names. fixImports() function in JS glue code deals with this for wasm. * Change command-line option names in order to be consistent with asm.js. * Add missing lowering code for llvm.eh.typeid.for intrinsics * Delete commas in mangled function names * Fix a function argument attributes bug. Because we add the pointer to the original callee as the first argument of invoke wrapper, all argument attribute indices have to be incremented by one. Patch by Heejin Ahn Differential Revision: https://reviews.llvm.org/D23258 llvm-svn: 278081
* [WebAssembly] Add asm.js-style exception handling supportDerek Schuff2016-08-011-0/+14
| | | | | | | | | | | | | | | | | | Summary: This patch includes asm.js-style exception handling support for WebAssembly. The WebAssembly MVP does not have any support for unwinding or non-local control flow. In order to support C++ exceptions, emscripten currently uses JavaScript exceptions along with some support code (written in JavaScript) that is bundled by emscripten with the generated code. This scheme lowers exception-related instructions for wasm such that wasm modules can be compatible with emscripten's existing scheme and share the support code. Patch by Heejin Ahn Differential Revision: https://reviews.llvm.org/D22958 llvm-svn: 277391
* [WebAssembly] Optimize away return instructions using fallthroughs.Dan Gohman2016-05-211-3/+3
| | | | | | | | | This saves a small amount of code size, and is a first small step toward passing values on the stack across block boundaries. Differential Review: http://reviews.llvm.org/D20450 llvm-svn: 270294
* [WebAssembly] Update WebAssembly target for r269988.Dan Gohman2016-05-191-3/+10
| | | | llvm-svn: 270017
* Factor PrologEpilogInserter around spilling, frame finalization, and scavengingDerek Schuff2016-05-171-8/+0
| | | | | | | | | | | | | | | PrologEpilogInserter has these 3 phases, which are related, but not all of them are needed by all targets. This patch reorganizes PEI's varous functions around those phases for more clear separation. It also introduces a new TargetMachine hook, usesPhysRegsForPEI, which is true for non-virtual targets. When it is true, all the phases operate as before, and PEI requires the AllVRegsAllocated property on MachineFunctions. Otherwise, CSR spilling and scavenging are skipped and only prolog/epilog insertion/frame finalization is done. Differential Revision: http://reviews.llvm.org/D18366 llvm-svn: 269750
* [WebAssembly] Move register stackification and coloring to a late phase.Dan Gohman2016-05-101-23/+27
| | | | | | | | | | | | | | | | | | | Move the register stackification and coloring passes to run very late, after PEI, tail duplication, and most other passes. This means that all code emitted and expanded by those passes is now exposed to these passes. This also eliminates the need for prologue/epilogue code to be manually stackified, which significantly simplifies the code. This does require running LiveIntervals a second time. It's useful to think of these late passes not as late optimization passes, but as a domain-specific compression algorithm based on knowledge of liveness information. It's used to compress the code after all conventional optimizations are complete, which is why it uses LiveIntervals at a phase when actual optimization passes don't typically need it. Differential Revision: http://reviews.llvm.org/D20075 llvm-svn: 269012
* CodeGen: Move TargetPassConfig from Passes.h to an own header; NFCMatthias Braun2016-05-101-0/+1
| | | | | | | | Many files include Passes.h but only a fraction needs to know about the TargetPassConfig class. Move it into an own header. Also rename Passes.cpp to TargetPassConfig.cpp while we are at it. llvm-svn: 269011
* Disable the PatchableFunction pass for NVPTX & WasmSanjoy Das2016-04-191-0/+1
| | | | | | | PatchableFunction requires AllVRegsAllocated that these targets don't provide. llvm-svn: 266720
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* [WebAssembly] Remove duplicate disabling of passesDerek Schuff2016-03-281-12/+6
| | | | | | Also put all the disabled passes together llvm-svn: 264684
* Introduce MachineFunctionProperties and the AllVRegsAllocated propertyDerek Schuff2016-03-281-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | MachineFunctionProperties represents a set of properties that a MachineFunction can have at particular points in time. Existing examples of this idea are MachineRegisterInfo::isSSA() and MachineRegisterInfo::tracksLiveness() which will eventually be switched to use this mechanism. This change introduces the AllVRegsAllocated property; i.e. the property that all virtual registers have been allocated and there are no VReg operands left. With this mechanism, passes can declare that they require a particular property to be set, or that they set or clear properties by implementing e.g. MachineFunctionPass::getRequiredProperties(). The MachineFunctionPass base class verifies that the requirements are met, and handles the setting and clearing based on the delcarations. Passes can also directly query and update the current properties of the MF if they want to have conditional behavior. This change annotates the target-independent post-regalloc passes; future changes will also annotate target-specific ones. Reviewers: qcolombet, hfinkel Differential Revision: http://reviews.llvm.org/D18421 llvm-svn: 264593
* [WebAssembly] Implement irreducible control flow.Dan Gohman2016-03-091-0/+3
| | | | | | | | This implements a very simple conservative transformation that doesn't require more than linear code size growth. There's room for much more optimization in this space. llvm-svn: 262982
* [WebAssembly] Re-enable the TailDuplicate pass.Dan Gohman2016-02-221-1/+0
| | | | llvm-svn: 261566
* [WebAssembly] Don't use setRequiresStructuredCFG(true).Dan Gohman2016-02-181-3/+4
| | | | | | | | | | | | While we still do want reducible control flow, the RequiresStructuredCFG flag imposes more strict structure constraints than WebAssembly wants. Unsetting this flag enables critical edge splitting and tail merging. Also, disable TailDuplication explicitly, as it doesn't support virtual registers, and was previously only disabled by the RequiresStructuredCFG flag. llvm-svn: 261190
* [WebAssembly] Disable register stackification and coloring when not optimizingDerek Schuff2016-02-171-4/+6
| | | | | | | | | | | | | | These passes are optimizations, and should be disabled when not optimizing. Also create an MCCodeGenInfo so the opt level is correctly plumbed to the backend pass manager. Also remove the command line flag for disabling register coloring; running llc with -O0 should now be useful for debugging, so it's not necessary. Differential Revision: http://reviews.llvm.org/D17327 llvm-svn: 261176
* [WebAssembly] Implement unaligned loads and stores.Dan Gohman2016-01-261-0/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D16534 llvm-svn: 258779
* [WebAssembly] Disable some WebAssembly-specific optimization passes at -O0.Dan Gohman2016-01-191-3/+6
| | | | llvm-svn: 258127
* [WebAssembly] Add -m:e to the target triple.Dan Gohman2016-01-071-2/+3
| | | | | | | This enables ELF-style name mangling, which primarily means using ".L" for private symbols. llvm-svn: 257020
* [WebAssembly] Fix handling of COPY instructions in WebAssemblyRegStackify.Dan Gohman2015-12-251-6/+3
| | | | | | | | | | | | | Move RegStackify after coalescing and teach it to use LiveIntervals instead of depending on SSA form. This avoids a problem where a register in a COPY instruction is stackified and then subsequently coalesced with a register that is not stackified. This also puts it after the scheduler, which allows us to simplify the EXPR_STACK constraint, as we no longer have instructions being reordered after stackification and before coloring. llvm-svn: 256402
* [WebAssembly] Convert WebAssemblyTargetObjectFile to TargetLoweringObjectFileELFDan Gohman2015-12-171-2/+2
| | | | llvm-svn: 255877
* [WebAssembly] Experimental ELF writer supportDan Gohman2015-12-171-4/+3
| | | | | | | | | This creates the initial infrastructure for writing ELF output files. It doesn't yet have any implementation for encoding instructions. Differential Revision: http://reviews.llvm.org/D15555 llvm-svn: 255869
* [WebAssembly] Implement eliminateCallFramePseudoDerek Schuff2015-12-161-0/+3
| | | | | | | | | | | | | | | | | | Summary: Implement eliminateCallFramePsuedo to handle ADJCALLSTACKUP/DOWN pseudo-instructions. Add a test calling a vararg function which causes non-0 adjustments. This revealed an issue with RegisterCoalescer wherein it eliminates a COPY from SP32 to a vreg but failes to update the live ranges of EXPR_STACK, causing a machineinstr verifier failure (so this test is commented out). Also add a dynamic alloca test, which causes a callseq_end dag node with a 0 (instead of undef) second argument to be generated. We currently fail to select that, so adjust the ADJCALLSTACKUP tablegen code to handle it. Differential Revision: http://reviews.llvm.org/D15587 llvm-svn: 255844
* [WebAssembly] Implement prolog/epilog insertion and FrameIndex eliminationDerek Schuff2015-12-111-1/+7
| | | | | | | | | | | | | | | | | | Summary: Use the SP32 physical register as the base for FrameIndex lowering. Update it and the __stack_pointer global var in the prolog and epilog. Extend the mapping of virtual registers to wasm locals to include the physical registers. Rather than modify the target-independent PrologEpilogInserter (which asserts that there are no virtual registers left) include a slightly-modified copy for Wasm that does not have this assertion and only clears the virtual registers if scavenging was needed (which of course it isn't for wasm). Differential Revision: http://reviews.llvm.org/D15344 llvm-svn: 255392
* [WebAssembly] Reintroduce ARGUMENT moving logicDan Gohman2015-12-091-0/+4
| | | | | | | | | | | | | | | | | | | Reinteroduce the code for moving ARGUMENTS back to the top of the basic block. While the ARGUMENTS physical register prevents sinking and scheduling from moving them, it does not appear to be sufficient to prevent SelectionDAG from moving them down in the initial schedule. This patch introduces a patch that moves them back to the top immediately after SelectionDAG runs. This is still hopefully a temporary solution. http://reviews.llvm.org/D14750 is one alternative, though the review has not been favorable, and proposed alternatives are longer-term and have other downsides. This fixes the main outstanding -verify-machineinstrs failures, so it adds -verify-machineinstrs to several tests. Differential Revision: http://reviews.llvm.org/D15377 llvm-svn: 255125
* [WebAssembly] Call TargetPassConfig base class functions in overriding ↵Dan Gohman2015-12-051-1/+11
| | | | | | functions. llvm-svn: 254855
* [WebAssembly] Implement ReverseBranchCondition, and re-enable ↵Dan Gohman2015-12-051-4/+3
| | | | | | | | | | | | | MachineBlockPlacement This patch introduces a codegen-only instruction currently named br_unless, which makes it convenient to implement ReverseBranchCondition and re-enable the MachineBlockPlacement pass. Then in a late pass, it lowers br_unless back into br_if. Differential Revision: http://reviews.llvm.org/D14995 llvm-svn: 254826
* [WebAssembly] Delete unused functions. NFC.Dan Gohman2015-11-291-6/+0
| | | | llvm-svn: 254268
* [WebAssembly] Minor clang-format and selected clang-tidy cleanups. NFC.Dan Gohman2015-11-291-3/+2
| | | | llvm-svn: 254267
* [WebAssembly] Add some comments. NFC.Dan Gohman2015-11-251-0/+5
| | | | llvm-svn: 254096
* [WebAssembly] Clean up several FIXME comments.Dan Gohman2015-11-251-4/+4
| | | | llvm-svn: 254079
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