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* Try to fix WebAssembly build after r247864Hans Wennborg2015-09-161-1/+1
| | | | llvm-svn: 247870
* [WebAssembly] Check in an initial CFG Stackifier passDan Gohman2015-09-161-1/+7
| | | | | | | | | | | | This pass implements a simple algorithm for conversion from CFG to wasm's structured control flow. It doesn't yet handle multiple-entry loops; that will be added in a future patch. It also adds initial support for switch statements. Differential Revision: http://reviews.llvm.org/D12735 llvm-svn: 247818
* [WebAssembly] Support running without a register allocator in the default ↵Dan Gohman2015-09-081-35/+0
| | | | | | | | | | | | | CodeGen passes This allows backends which don't use a traditional register allocator, but do need PHI lowering and other passes, to use the default TargetPassConfig::addFastRegAlloc and TargetPassConfig::addOptimizedRegAlloc implementations. Differential Revision: http://reviews.llvm.org/D12691 llvm-svn: 247065
* [WebAssembly] Enable SSA lowering and other pre-regalloc passesDan Gohman2015-09-081-1/+21
| | | | llvm-svn: 247008
* [WebAssembly] Use the default alignment for SIMD types.Dan Gohman2015-08-191-2/+2
| | | | | | | | | Previously WebAssembly's datalayout string had -v128:8:128. This had been an attempt to declare a certain level of support for unaligned SIMD accesses. However, clang makes its own determinations for SIMD alignment that are independent of the datalayout string, so this wasn't actually meaningful. llvm-svn: 245494
* Use llvm::make_unique to fix the MSVC build.Rafael Espindola2015-08-111-1/+1
| | | | llvm-svn: 244641
* WebAssembly: print basic integer assembly.JF Bastien2015-07-311-1/+9
| | | | | | | | | | | | | | | | | | | Summary: This prints assembly for int32 integer operations defined in WebAssemblyInstrInteger.td only, with major caveats: - The operation names are currently incorrect. - Other integer and floating-point types will be added later. - The printer isn't factored out to handle recursive AST code yet, since it can't even handle control flow anyways. - The assembly format isn't full s-expressions yet either, this will be added later. - This currently disables PrologEpilogCodeInserter as well as MachineCopyPropagation becasue they don't like virtual registers, which WebAssembly likes quite a bit. This will be fixed by factoring out NVPTX's change (currently a fork of PrologEpilogCodeInserter). Reviewers: sunfish Subscribers: llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11671 llvm-svn: 243763
* WebAssembly: start instructionsJF Bastien2015-07-011-3/+9
| | | | | | | | | | | | | | | | | | | | Summary: * Add 64-bit address space feature. * Rename SIMD feature to SIMD128. * Handle single-thread model with an IR pass (same way ARM does). * Rename generic processor to MVP, to follow design's lead. * Add bleeding-edge processors, with all features included. * Fix a few DEBUG_TYPE to match other backends. Test Plan: ninja check Reviewers: sunfish Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D10880 llvm-svn: 241211
* [WebAssembly] Define separate Target instances for 32-bit and 64-bit.Dan Gohman2015-07-011-1/+2
| | | | llvm-svn: 241193
* [WebAssembly] Initial WebAssembly backendDan Gohman2015-06-291-0/+166
This WebAssembly backend is just a skeleton at this time and is not yet functional. llvm-svn: 241022
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