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author | JF Bastien <jfb@google.com> | 2015-07-31 17:53:38 +0000 |
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committer | JF Bastien <jfb@google.com> | 2015-07-31 17:53:38 +0000 |
commit | 600aee98057e8657140713cd2a0dd6e5ff0247b8 (patch) | |
tree | 6c5e655f0da8454a616515d36ee2e63c0e968c7e /llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | |
parent | bf1e5c0ee9256f0c0fc3f6dfad32c9cef81268a5 (diff) | |
download | bcm5719-llvm-600aee98057e8657140713cd2a0dd6e5ff0247b8.tar.gz bcm5719-llvm-600aee98057e8657140713cd2a0dd6e5ff0247b8.zip |
WebAssembly: print basic integer assembly.
Summary:
This prints assembly for int32 integer operations defined in WebAssemblyInstrInteger.td only, with major caveats:
- The operation names are currently incorrect.
- Other integer and floating-point types will be added later.
- The printer isn't factored out to handle recursive AST code yet, since it can't even handle control flow anyways.
- The assembly format isn't full s-expressions yet either, this will be added later.
- This currently disables PrologEpilogCodeInserter as well as MachineCopyPropagation becasue they don't like virtual registers, which WebAssembly likes quite a bit. This will be fixed by factoring out NVPTX's change (currently a fork of PrologEpilogCodeInserter).
Reviewers: sunfish
Subscribers: llvm-commits, jfb
Differential Revision: http://reviews.llvm.org/D11671
llvm-svn: 243763
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp index 6f93248bd13..bac635d76fa 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp @@ -166,7 +166,15 @@ void WebAssemblyPassConfig::addPreRegAlloc() {} void WebAssemblyPassConfig::addRegAllocPasses(bool Optimized) {} -void WebAssemblyPassConfig::addPostRegAlloc() {} +void WebAssemblyPassConfig::addPostRegAlloc() { + // FIXME: the following passes dislike virtual registers. Disable them for now + // so that basic tests can pass. Future patches will remedy this. + // + // Fails with: Regalloc must assign all vregs. + disablePass(&PrologEpilogCodeInserterID); + // Fails with: should be run after register allocation. + disablePass(&MachineCopyPropagationID); +} void WebAssemblyPassConfig::addPreSched2() {} |