| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Move Post RA Scheduling flag bit into SchedMachineModel | Sanjay Patel | 2014-07-15 | 1 | -10/+1 |
| * | [RegAllocGreedy] Provide a subtarget hook to disable the local reassignment | Quentin Colombet | 2014-07-02 | 1 | -0/+5 |
| * | Add a new subtarget hook for whether or not we'd like to enable | Eric Christopher | 2014-06-19 | 1 | -0/+4 |
| * | Add a subtarget hook: enablePostMachineScheduler. | Andrew Trick | 2014-06-04 | 1 | -0/+4 |
| * | Update an embarassing out-of-date comment. | Andrew Trick | 2014-05-06 | 1 | -5/+6 |
| * | Re-sort all of the includes with ./utils/sort_includes.py so that | Chandler Carruth | 2014-01-07 | 1 | -1/+1 |
| * | Added temp flag -misched-bench for staging in default changes. | Andrew Trick | 2013-09-26 | 1 | -1/+16 |
| * | Add useAA() to TargetSubtargetInfo | Hal Finkel | 2013-08-29 | 1 | -0/+4 |
| * | misched: Allow subtargets to enable misched and dependent options. | Andrew Trick | 2012-11-13 | 1 | -0/+4 |
| * | Rename TargetSubtarget to TargetSubtargetInfo for consistency. | Evan Cheng | 2011-07-01 | 1 | -0/+33 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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