| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Mark IMPLICIT_DEF as being rematerializable and cheap-as-a-move. | Dan Gohman | 2008-09-09 | 1 | -0/+2 |
| * | TargetRegisterDesc::Name field is the same as the abstract register name. The... | Evan Cheng | 2008-07-07 | 1 | -1/+0 |
| * | Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating | Dan Gohman | 2008-07-01 | 1 | -2/+16 |
| * | Teach the DAGISelEmitter to not compute the variable_ops operand | Dan Gohman | 2008-05-31 | 1 | -6/+0 |
| * | Fix a tblgen problem handling variable_ops in tblgen instruction | Dan Gohman | 2008-05-29 | 1 | -0/+6 |
| * | Add a flag to indicate that an instruction is as cheap (or cheaper) than a move | Bill Wendling | 2008-05-28 | 1 | -1/+4 |
| * | Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs... | Christopher Lamb | 2008-03-16 | 1 | -0/+8 |
| * | Remove isImplicitDef TargetInstrDesc flag. | Evan Cheng | 2008-03-15 | 1 | -1/+0 |
| * | Replace all target specific implicit def instructions with a target independe... | Evan Cheng | 2008-03-15 | 1 | -0/+7 |
| * | Recommitting parts of r48130. These do not appear to cause the observed failu... | Christopher Lamb | 2008-03-11 | 1 | -4/+8 |
| * | Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests. | Evan Cheng | 2008-03-10 | 1 | -8/+4 |
| * | Allow insert_subreg into implicit, target-specific values. | Christopher Lamb | 2008-03-10 | 1 | -4/+8 |
| * | Rename PrintableName to Name. | Bill Wendling | 2008-02-26 | 1 | -1/+1 |
| * | Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool | Bill Wendling | 2008-02-26 | 1 | -1/+1 |
| * | Some platforms use the same name for 32-bit and 64-bit registers (like | Bill Wendling | 2008-02-24 | 1 | -0/+1 |
| * | Move some useful operands up into the all-targets .td | Nate Begeman | 2008-02-14 | 1 | -0/+3 |
| * | SDIsel processes llvm.dbg.declare by recording the variable debug information... | Evan Cheng | 2008-02-02 | 1 | -1/+8 |
| * | Add an extra operand to LABEL nodes which distinguishes between debug, EH, or... | Evan Cheng | 2008-01-31 | 1 | -1/+1 |
| * | Start inferring side effect information more aggressively, and fix many bugs ... | Chris Lattner | 2008-01-10 | 1 | -6/+9 |
| * | add a new bit. | Chris Lattner | 2008-01-07 | 1 | -1/+2 |
| * | remove a dead field. | Chris Lattner | 2008-01-07 | 1 | -1/+0 |
| * | rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. | Chris Lattner | 2008-01-06 | 1 | -1/+1 |
| * | rename isStore -> mayStore to more accurately reflect what it captures. | Chris Lattner | 2008-01-06 | 1 | -1/+1 |
| * | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| * | As per feedback, revised comments to (hopefully) make the different side effect | Bill Wendling | 2007-12-17 | 1 | -3/+12 |
| * | Add flags to indicate that there are "never" side effects or that there "may be" | Bill Wendling | 2007-12-14 | 1 | -0/+5 |
| * | Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materia... | Evan Cheng | 2007-12-12 | 1 | -0/+1 |
| * | Add a flag for indirect branch instructions. | Owen Anderson | 2007-11-12 | 1 | -0/+1 |
| * | Clarify the meaning of '-2' register number | Anton Korobeynikov | 2007-11-11 | 1 | -2/+4 |
| * | Use TableGen to emit information for dwarf register numbers. | Anton Korobeynikov | 2007-11-11 | 1 | -5/+5 |
| * | Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value | Evan Cheng | 2007-09-19 | 1 | -0/+6 |
| * | Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. | Evan Cheng | 2007-09-11 | 1 | -7/+0 |
| * | Add target independent MachineInstr's to represent subreg insert/extract in M... | Christopher Lamb | 2007-07-26 | 1 | -0/+12 |
| * | No more noResults. | Evan Cheng | 2007-07-21 | 1 | -1/+0 |
| * | Change instruction description to split OperandList into OutOperandList and | Evan Cheng | 2007-07-19 | 1 | -6/+14 |
| * | Remove clobbersPred. | Evan Cheng | 2007-07-10 | 1 | -1/+0 |
| * | Do away with ImmutablePredicateOperand. | Evan Cheng | 2007-07-06 | 1 | -8/+1 |
| * | Add OptionalDefOperand to stand for optionally defined result. | Evan Cheng | 2007-07-06 | 1 | -7/+10 |
| * | - Added zero_reg def to stand for register 0. | Evan Cheng | 2007-07-05 | 1 | -2/+19 |
| * | Revert the earlier change that removed the M_REMATERIALIZABLE machine | Dan Gohman | 2007-06-26 | 1 | -0/+1 |
| * | Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad | Dan Gohman | 2007-06-19 | 1 | -1/+0 |
| * | Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. | Evan Cheng | 2007-06-19 | 1 | -0/+1 |
| * | Add support to tablegen for specifying subregister classes on a per register ... | Christopher Lamb | 2007-06-13 | 1 | -0/+4 |
| * | Added clobbersPred. | Evan Cheng | 2007-06-06 | 1 | -0/+1 |
| * | Added isPredicable bit to class Instruction. | Evan Cheng | 2007-05-16 | 1 | -0/+1 |
| * | PredicateOperand can be used as a normal operand for isel. | Evan Cheng | 2007-05-08 | 1 | -1/+1 |
| * | Add an "implies" field to features. This indicates that, if the current | Bill Wendling | 2007-05-04 | 1 | -1/+7 |
| * | expose HonorSignDependentRoundingFPMathOption to .td files | Chris Lattner | 2007-05-03 | 1 | -0/+5 |
| * | llvm bug #1350, parts 1, 2, and 3. | Nate Begeman | 2007-05-01 | 1 | -7/+9 |
| * | Add sub-registers sets. | Evan Cheng | 2007-04-20 | 1 | -1/+16 |
