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* [SystemZ] Support Swift Calling ConventionBryan Chan2016-04-281-0/+8
| | | | | | | | | | | | | | | | Summary: Port rL265480, rL264754, rL265997 and rL266252 to SystemZ, in order to enable the Swift port on the architecture. SwiftSelf and SwiftError are assigned to R10 and R9, respectively, which are normally callee-saved registers. For more information, see: RFC: Implementing the Swift calling convention in LLVM and Clang https://groups.google.com/forum/#!topic/llvm-dev/epDd2w93kZ0 Reviewers: kbarton, manmanren, rjmccall, uweigand Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D19414 llvm-svn: 267823
* [SystemZ] Use LDE32 instead of LE, when Offset is small.Jonas Paulsson2016-04-121-1/+7
| | | | | | | | | | | | On z13, if eliminateFrameIndex() chooses LE (and not LEY), immediately transform that LE to LDE32 to avoid partial register dependencies. LEY should be generally preferred for big offsets over an expansion into LAY + LDE32. Reviewed by Ulrich Weigand. llvm-svn: 266060
* Remove redundant TargetFrameLowering::getFrameIndexOffset virtualJames Y Knight2015-08-151-2/+2
| | | | | | | | | | | function. This was the same as getFrameIndexReference, but without the FrameReg output. Differential Revision: http://reviews.llvm.org/D12042 llvm-svn: 245148
* Target RegisterInfo: devirtualize TargetFrameLoweringJF Bastien2015-07-101-3/+3
| | | | | | | | | | | | | Summary: The target frame lowering's concrete type is always known in RegisterInfo, yet it's only sometimes devirtualized through a static_cast. This change adds an auto-generated static function <Target>GenRegisterInfo::getFrameLowering(const MachineFunction &MF) which does this devirtualization, and uses this function in all targets which can. This change was suggested by sunfish in D11070 for WebAssembly, I figure that I may as well improve the other targets while I'm here. Subscribers: sunfish, ted, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11093 llvm-svn: 241921
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-1/+2
| | | | | | | MachineFunction argument so that we can grab subtarget specific features off of it. llvm-svn: 231979
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-8/+5
| | | | | | | | | | | shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lookups from the MachineFunction easily. Update the MIPS subtarget switching machinery to update this pointer at the same time it runs. llvm-svn: 214838
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-5/+8
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* [SystemZ] Use SystemZCallingConv.td to define callee-saved registersRichard Sandiford2014-07-101-11/+7
| | | | | | Just a clean-up. No behavioral change intended. llvm-svn: 212711
* Remove target machine caching from SystemZInstrInfo andEric Christopher2014-06-271-4/+7
| | | | | | | | SystemZRegisterInfo and replace it with the subtarget as that's all they needed in the first place. Update all uses and calls accordingly. llvm-svn: 211877
* [cleanup] Lift using directives, DEBUG_TYPE definitions, and even someChandler Carruth2014-04-221-2/+2
| | | | | | | | | | | | system headers above the includes of generated '.inc' files that actually contain code. In a few targets this was already done pretty consistently, but it wasn't done *really* consistently anywhere. It is strictly cleaner IMO and necessary in a bunch of places where the DEBUG_TYPE is referenced from the generated code. Consistency with the necessary places trumps. Hopefully the build bots are OK with the movement of intrin.h... llvm-svn: 206838
* Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper2014-04-041-2/+2
| | | | llvm-svn: 205610
* [SystemZ] Use "auto" for cast resultsRichard Sandiford2014-03-061-10/+9
| | | | | | No functional change intended. llvm-svn: 203106
* [SystemZ] Use upper words of GR64s for codegenRichard Sandiford2013-10-011-0/+2
| | | | | | | | | | | | | | This just adds the basics necessary for allocating the upper words to virtual registers (move, load and store). The move support is parameterised in a way that makes it easy to handle zero extensions, but the associated zero-extend patterns are added by a later patch. The easiest way of testing this seemed to be add a new "h" register constraint for high words. I don't expect the constraint to be useful in real inline asms, but it should work, so I didn't try to hide it behind an option. llvm-svn: 191739
* [SystemZ] Rename 32-bit GPR registersRichard Sandiford2013-09-301-2/+2
| | | | | | | | I'm about to add support for high-word operations, so it seemed better for the low-word registers to have names like R0L rather than R0W. No behavioral change intended. llvm-svn: 191655
* [SystemZ] Clean up register scavenging codeRichard Sandiford2013-07-051-26/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | SystemZ wants normal register scavenging slots, as close to the stack or frame pointer as possible. The only reason it was using custom code was because PrologEpilogInserter assumed an x86-like layout, where the frame pointer is at the opposite end of the frame from the stack pointer. This meant that when frame pointer elimination was disabled, the slots ended up being as close as possible to the incoming stack pointer, which is the opposite of what we want on SystemZ. This patch adds a new knob to say which layout is used and converts SystemZ to use target-independent scavenging slots. It's one of the pieces needed to support frame-to-frame MVCs, where two slots might be required. The ABI requires us to allocate 160 bytes for calls, so one approach would be to use that area as temporary spill space instead. It would need some surgery to make sure that the slot isn't live across a call though. I stuck to the "isFPCloseToIncomingSP - ..." style comment on the "do what the surrounding code does" principle. The FP case is already covered by several Systemz/frame-* tests, which fail without the PrologueEpilogueInserter change, so no new ones are needed. No behavioural change intended. llvm-svn: 185696
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-3/+6
| | | | | | | | the internals of TargetMachine could change. No functionality change intended. llvm-svn: 183567
* [SystemZ] Add back endUlrich Weigand2013-05-061-0/+162
| | | | | | | | | | | | | | This adds the actual lib/Target/SystemZ target files necessary to implement the SystemZ target. Note that at this point, the target cannot yet be built since the configure bits are missing. Those will be provided shortly by a follow-on patch. This version of the patch incorporates feedback from reviews by Chris Lattner and Anton Korobeynikov. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181203
* Remove the SystemZ backend.Dan Gohman2011-10-241-143/+0
| | | | llvm-svn: 142878
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-16/+1
| | | | | | | | | to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. llvm-svn: 135424
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-1/+0
| | | | | | registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-2/+1
| | | | llvm-svn: 134030
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
| | | | llvm-svn: 134027
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-271-1/+4
| | | | | | into XXXGenRegisterInfo.inc. llvm-svn: 133922
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-241-4/+4
| | | | | | | | | | | | target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
* Remove custom allocation orders in SystemZ.Jakob Stoklund Olesen2011-06-151-1/+11
| | | | | | | | | | | | | | | | | | Note that this actually changes code generation, and someone who understands this target better should check the changes. - R12Q is now allocatable. I think it was omitted from the allocation order by mistake since it isn't reserved. It as apparently used as a GOT pointer sometimes, and it should probably be reserved if that is the case. - The GR64 registers are allocated in a different order now. The register allocator will automatically put the CSRs last. There were other changes to the order that may have been significant. The test fix is because r0 and r1 swapped places in the allocation order. llvm-svn: 133067
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-301-0/+6
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* Implement SystemZRegisterInfo::getMatchingSuperRegClass to enable ↵Jakob Stoklund Olesen2011-05-041-0/+14
| | | | | | cross-class joins. llvm-svn: 130857
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-101-3/+3
| | | | | | and fixes here and there. llvm-svn: 123170
* Move more PEI-related hooks to TFIAnton Korobeynikov2010-11-271-35/+0
| | | | llvm-svn: 120229
* Move some more hooks to TargetFrameInfoAnton Korobeynikov2010-11-201-23/+1
| | | | llvm-svn: 119904
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-10/+6
| | | | llvm-svn: 119740
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-151-137/+0
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-261-5/+4
| | | | | | to try to re-use scavenged frame index reference registers. rdar://8277890 llvm-svn: 112241
* cleanupRafael Espindola2010-06-021-16/+0
| | | | llvm-svn: 105322
* SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead andBill Wendling2010-05-141-5/+5
| | | | | | | | replace the check with the appropriate predicate. Modify the testcase to reflect the correct code. (It should be saving callee-saved registers on the stack allocated by the calling fuction.) llvm-svn: 103829
* Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling2010-05-141-5/+5
| | | | | | | | | the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. llvm-svn: 103802
* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-211-1/+1
| | | | | | | optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 llvm-svn: 101984
* Fix a number of clang -Wsign-compare warnings that didn't have an obviousJohn McCall2010-04-061-1/+1
| | | | | | | solution. The only reason these don't fire with gcc-4.2 is that gcc turns off part of -Wsign-compare in C++ on accident. llvm-svn: 100581
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-4/+2
| | | | llvm-svn: 100214
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-091-1/+1
| | | | | | | | | | is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. llvm-svn: 98086
* constify a method argument.Chris Lattner2010-01-261-3/+4
| | | | llvm-svn: 94612
* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-1/+1
| | | | | | Patch by Howard Hinnant! llvm-svn: 90365
* Make the MachineFunction argument of getFrameRegister const.David Greene2009-11-121-1/+2
| | | | | | This also fixes a build error. llvm-svn: 87027
* Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach2009-10-071-2/+5
| | | | | | | | | | | | | | | | | | | | a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. llvm-svn: 83467
* Remove some unused variables and methods warned about byDuncan Sands2009-09-061-1/+0
| | | | | | icc (#177, partial). Patch by Erick Tryzelaar. llvm-svn: 81106
* Handle long-disp stuff more consistentlyAnton Korobeynikov2009-07-161-6/+22
| | | | llvm-svn: 76059
* Fix incomin arg stack frame offset in case we need to generate stack frameAnton Korobeynikov2009-07-161-1/+1
| | | | llvm-svn: 76049
* Handle FP callee-saved regsAnton Korobeynikov2009-07-161-4/+22
| | | | llvm-svn: 76029
* Add FP regsAnton Korobeynikov2009-07-161-1/+1
| | | | llvm-svn: 76013
* Missed part of prev. patchAnton Korobeynikov2009-07-161-1/+3
| | | | llvm-svn: 76008
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