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path: root/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
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* [TargetLowering] Add code size information on isFPImmLegal. NFCAdhemerval Zanella2019-03-181-1/+2
* Add support for computing "zext of value" in KnownBits. NFCIBjorn Pettersson2019-02-281-4/+2
* Seperate volatility and atomicity/ordering in SelectionDAGPhilip Reames2019-02-271-0/+21
* [SystemZ] Wait with selection of legal vector/FP constants until Select().Jonas Paulsson2019-02-261-136/+111
* Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."Jonas Paulsson2019-02-151-0/+8
* Revert "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."Francis Visoiu Mistrih2019-02-151-8/+0
* [SystemZ] Do not emit VEXTEND or VROUND nodes without vector support.Jonas Paulsson2019-02-141-0/+8
* [SystemZ] Use VGM whenever possible to load FP immediates.Jonas Paulsson2019-02-121-1/+31
* [SystemZ] Improved handling of the @llvm.ctlz intrinsic.Jonas Paulsson2019-02-061-0/+1
* [SystemZ] Wait with VGBM selection until after DAGCombine2.Jonas Paulsson2019-02-061-21/+16
* [SystemZ] Do not return INT_MIN from strcmp/memcmpUlrich Weigand2019-02-061-40/+81
* [DAG][SystemZ] Define unwrapAddress for PCREL_WRAPPER.Nirav Dave2019-01-311-0/+6
* [SystemZ] Remember to reset the NoPHIs property on MF in createPHIsForSelects()Jonas Paulsson2019-01-241-0/+2
* [SystemZ] Handle DBG_VALUE instructions in two places in backend.Jonas Paulsson2019-01-231-6/+7
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [SystemZ] Always use the version of computeKnownBits that returns a value. NFCI.Simon Pilgrim2018-12-211-15/+11
* [SystemZ] Make better use of VLDEBUlrich Weigand2018-12-201-1/+50
* [SystemZ] Increase the number of VLREPsJonas Paulsson2018-11-131-0/+42
* [SystemZ] Replicate the load with most uses in buildVector()Jonas Paulsson2018-11-121-8/+11
* [SystemZ] Avoid inserting same value after replicationJonas Paulsson2018-11-091-1/+3
* [SystemZ] Simplify LRV/STRV ISD nodesUlrich Weigand2018-10-301-6/+6
* [SystemZ] Improve handling and cost estimates of vector integer div/remJonas Paulsson2018-10-251-0/+25
* [NFC] Rename minnan and maxnan to minimum and maximumThomas Lively2018-10-241-10/+10
* [MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth2018-08-161-1/+1
* [SystemZ] Replace subreg_r with subreg_hKrzysztof Parzyszek2018-08-151-2/+2
* [SystemZ, TableGen] Fix shift count handlingUlrich Weigand2018-08-011-78/+0
* Remove trailing spaceFangrui Song2018-07-301-2/+2
* [DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELTSimon Pilgrim2018-07-171-10/+26
* [SystemZ] Bugfix in combineSTORE().Jonas Paulsson2018-05-251-1/+1
* Fix a bunch of places where operator-> was used directly on the return from d...Craig Topper2018-05-051-3/+3
* [SystemZ] Handle SADDO et.al. and ADD/SUBCARRYUlrich Weigand2018-04-301-0/+163
* [SystemZ] Do not use glue to represent condition code dependenciesUlrich Weigand2018-04-301-94/+192
* [SystemZ] Improve handling of Select pseudo-instructionsUlrich Weigand2018-04-301-17/+4
* [SystemZ] Use preferred 16-byte function alignmentUlrich Weigand2018-04-241-0/+2
* [SystemZ] Bugfix of CC liveness in emitMemMemWrapper (CLC).Jonas Paulsson2018-03-191-0/+4
* [SystemZ] computeKnownBitsForTargetNode() / ComputeNumSignBitsForTargetNode()Jonas Paulsson2018-03-171-19/+289
* TargetMachine: Add address space to getPointerSizeMatt Arsenault2018-03-141-1/+1
* [SystemZ] Allow LRV/STRV with volatile memory accessesUlrich Weigand2018-03-021-6/+1
* [SystemZ] Support stackmaps and patchpointsUlrich Weigand2018-03-021-0/+11
* [SystemZ] Support vector registers in inline asmUlrich Weigand2018-03-021-8/+35
* [TLS] use emulated TLS if the target supports only this modeChih-Hung Hsieh2018-02-281-1/+1
* [SystemZ] Check the bitwidth before calling isInt/isUInt.Jonas Paulsson2018-01-311-1/+2
* [SystemZ] Fix bootstrap failure due to invalid DAG loopUlrich Weigand2018-01-221-2/+21
* [SystemZ] Directly use CC result of compare-and-swapUlrich Weigand2018-01-191-0/+124
* [SystemZ] Rework IPM sequence generationUlrich Weigand2018-01-191-122/+58
* [SystemZ] Implement computeKnownBitsForTargetNodeUlrich Weigand2018-01-191-0/+24
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-3/+3
* [SystemZ] Validate shifted compare value in adjustForTestUnderMaskUlrich Weigand2017-12-051-0/+2
* [SystemZ] Bugfix in adjustSubwordCmp.Jonas Paulsson2017-11-301-4/+11
* [SystemZ] Fix fall-out from r314428Ulrich Weigand2017-09-281-0/+6
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