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path: root/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
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* [Alignment][NFC] Remove unneeded llvm:: scoping on Align typesGuillaume Chatelet2019-09-271-2/+2
* [SystemZ] Improve emitSelect()Jonas Paulsson2019-09-251-33/+58
* [SystemZ] Support z15 processor nameUlrich Weigand2019-09-201-1/+1
* Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"Matt Arsenault2019-09-191-25/+24
* Revert r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"Hans Wennborg2019-09-191-24/+25
* GlobalISel: Don't materialize immarg arguments to intrinsicsMatt Arsenault2019-09-191-25/+24
* [SVE][MVT] Fixed-length vector MVT rangesGraham Hunter2019-09-171-3/+3
* [SystemZ] Call erase() on the right MBB in SystemZTargetLowering::emitSelect()Jonas Paulsson2019-09-161-1/+1
* [Alignment][NFC] Use Align with TargetLowering::setPrefFunctionAlignmentGuillaume Chatelet2019-09-061-1/+1
* [Alignment] fix dubious min function alignmentGuillaume Chatelet2019-09-061-1/+1
* [Alignment][NFC] Use Align with TargetLowering::setMinFunctionAlignmentGuillaume Chatelet2019-09-061-1/+1
* [LLVM][Alignment] Make functions using log of alignment explicitGuillaume Chatelet2019-09-051-2/+2
* [SystemZ] Support constrained fpto[su]i intrinsicsUlrich Weigand2019-09-021-0/+16
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-39/+39
* Emit diagnostic if an inline asm constraint requires an immediateBill Wendling2019-08-031-1/+1
* [SystemZ] Fix addcarry of addcarry of const carry (PR42606)Nikita Popov2019-07-121-2/+14
* [SystemZ] Add support for new cpu architecture - arch13Ulrich Weigand2019-07-121-13/+230
* [SystemZ] Fix addcarry of usubo (PR42512)Nikita Popov2019-07-051-0/+6
* CodeGen: Introduce a class for registersMatt Arsenault2019-06-241-27/+27
* [TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR...Simon Pilgrim2019-06-121-4/+2
* Allow target to handle STRICT floating-point nodesUlrich Weigand2019-06-051-0/+51
* [SystemZ] Bugfix in SystemZTargetLowering::combineIntDIVREM()Jonas Paulsson2019-05-171-1/+1
* [TargetLowering] Add code size information on isFPImmLegal. NFCAdhemerval Zanella2019-03-181-1/+2
* Add support for computing "zext of value" in KnownBits. NFCIBjorn Pettersson2019-02-281-4/+2
* Seperate volatility and atomicity/ordering in SelectionDAGPhilip Reames2019-02-271-0/+21
* [SystemZ] Wait with selection of legal vector/FP constants until Select().Jonas Paulsson2019-02-261-136/+111
* Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."Jonas Paulsson2019-02-151-0/+8
* Revert "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."Francis Visoiu Mistrih2019-02-151-8/+0
* [SystemZ] Do not emit VEXTEND or VROUND nodes without vector support.Jonas Paulsson2019-02-141-0/+8
* [SystemZ] Use VGM whenever possible to load FP immediates.Jonas Paulsson2019-02-121-1/+31
* [SystemZ] Improved handling of the @llvm.ctlz intrinsic.Jonas Paulsson2019-02-061-0/+1
* [SystemZ] Wait with VGBM selection until after DAGCombine2.Jonas Paulsson2019-02-061-21/+16
* [SystemZ] Do not return INT_MIN from strcmp/memcmpUlrich Weigand2019-02-061-40/+81
* [DAG][SystemZ] Define unwrapAddress for PCREL_WRAPPER.Nirav Dave2019-01-311-0/+6
* [SystemZ] Remember to reset the NoPHIs property on MF in createPHIsForSelects()Jonas Paulsson2019-01-241-0/+2
* [SystemZ] Handle DBG_VALUE instructions in two places in backend.Jonas Paulsson2019-01-231-6/+7
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [SystemZ] Always use the version of computeKnownBits that returns a value. NFCI.Simon Pilgrim2018-12-211-15/+11
* [SystemZ] Make better use of VLDEBUlrich Weigand2018-12-201-1/+50
* [SystemZ] Increase the number of VLREPsJonas Paulsson2018-11-131-0/+42
* [SystemZ] Replicate the load with most uses in buildVector()Jonas Paulsson2018-11-121-8/+11
* [SystemZ] Avoid inserting same value after replicationJonas Paulsson2018-11-091-1/+3
* [SystemZ] Simplify LRV/STRV ISD nodesUlrich Weigand2018-10-301-6/+6
* [SystemZ] Improve handling and cost estimates of vector integer div/remJonas Paulsson2018-10-251-0/+25
* [NFC] Rename minnan and maxnan to minimum and maximumThomas Lively2018-10-241-10/+10
* [MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth2018-08-161-1/+1
* [SystemZ] Replace subreg_r with subreg_hKrzysztof Parzyszek2018-08-151-2/+2
* [SystemZ, TableGen] Fix shift count handlingUlrich Weigand2018-08-011-78/+0
* Remove trailing spaceFangrui Song2018-07-301-2/+2
* [DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELTSimon Pilgrim2018-07-171-10/+26
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