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* Propagate debug loc.Devang Patel2010-07-061-2/+2
| | | | llvm-svn: 107710
* Reapply r107655 with fixes; insert the pseudo instruction intoDan Gohman2010-07-061-14/+13
| | | | | | | the block before calling the expansion hook. And don't put EFLAGS in a mbb's live-in list twice. llvm-svn: 107691
* Revert r107655.Dan Gohman2010-07-061-13/+14
| | | | llvm-svn: 107668
* Fix a bunch of custom-inserter functions to handle the case whereDan Gohman2010-07-061-14/+13
| | | | | | the pseudo instruction is not at the end of the block. llvm-svn: 107655
* Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill ↵Evan Cheng2010-07-031-5/+5
| | | | | | slots so it's always false. llvm-svn: 107550
* Remove isTwoAddress from Sparc.Eric Christopher2010-06-211-1/+1
| | | | llvm-svn: 106466
* Eliminate unnecessary uses of getZExtValue().Dan Gohman2010-06-181-3/+3
| | | | llvm-svn: 106279
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-172-5/+5
| | | | | | | | | | | | addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243
* cleanupRafael Espindola2010-06-022-10/+0
| | | | llvm-svn: 105322
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-0/+6
| | | | | | | | | | | | | | | | A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. llvm-svn: 104704
* Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen2010-05-261-6/+0
| | | | | | This reverts commit 104654. llvm-svn: 104660
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-0/+6
| | | | | | | | | | | | | | | | A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. llvm-svn: 104654
* Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman2010-05-114-4/+12
| | | | | | | | Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. llvm-svn: 103481
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-062-5/+4
| | | | | | doesn't have to guess. llvm-svn: 103194
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-062-4/+8
| | | | llvm-svn: 103193
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-012-9/+5
| | | | | | changes before doing phi lowering for switches. llvm-svn: 102809
* Delete an unnecessary reference to SelectionDAGISel::BB.Dan Gohman2010-04-191-1/+0
| | | | llvm-svn: 101824
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-174-16/+16
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* Move per-function state out of TargetLowering subclasses and intoDan Gohman2010-04-173-10/+21
| | | | | | MachineFunctionInfo subclasses. llvm-svn: 101634
* Add skeleton target-specific SelectionDAGInfo files.Dan Gohman2010-04-163-0/+52
| | | | llvm-svn: 101564
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-2/+2
| | | | llvm-svn: 101334
* add newlines at end of files.Chris Lattner2010-04-071-1/+1
| | | | llvm-svn: 100706
* Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.Jakob Stoklund Olesen2010-04-051-5/+1
| | | | | | | | | | | | | | | | | | | When a target instruction wants to set target-specific flags, it should simply set bits in the TSFlags bit vector defined in the Instruction TableGen class. This works well because TableGen resolves member references late: class I : Instruction { AddrMode AM = AddrModeNone; let TSFlags{3-0} = AM.Value; } let AM = AddrMode4 in def ADD : I; TSFlags gets the expected bits from AddrMode4 in this example. llvm-svn: 100384
* eliminate the magic AbsoluteDebugSectionOffsets MAI hook,Chris Lattner2010-04-041-1/+0
| | | | | | | | | which is really a property of the section being referenced. Add a predicate to MCSection to replace it. Yay for reduction in magic. llvm-svn: 100367
* Momentous day: remove the "O" member from AsmPrinter. Now all Chris Lattner2010-04-041-4/+3
| | | | | | | | | | "asm printering" happens through MCStreamer. This also Streamerizes PIC16 debug info, which escaped my attention. This removes a leak from LLVMTargetMachine of the 'legacy' output stream. llvm-svn: 100327
* convert the non-MCInstPrinter'ized EmitInstruction Chris Lattner2010-04-041-2/+5
| | | | | | | implementations to use EmitRawText instead of writing directly to "O". llvm-svn: 100318
* fix PrintAsmOperand and PrintAsmMemoryOperand to pass down Chris Lattner2010-04-041-6/+9
| | | | | | raw_ostream to print to. llvm-svn: 100313
* change a ton of code to not implicitly use the "O" raw_ostreamChris Lattner2010-04-041-20/+23
| | | | | | member of AsmPrinter. Instead, pass it in explicitly. llvm-svn: 100306
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-023-8/+7
| | | | llvm-svn: 100214
* tidy upChris Lattner2010-03-181-2/+2
| | | | llvm-svn: 98901
* eliminate the now-unneeded context argument of MBB::getSymbol()Chris Lattner2010-03-131-1/+1
| | | | llvm-svn: 98451
* rearrange MCContext ownership. Before LLVMTargetMachine created it Chris Lattner2010-03-131-3/+2
| | | | | | | | | | | and passing off ownership to AsmPrinter. Now MachineModuleInfo creates it and owns it by value. This allows us to use MCSymbols more consistently throughout the rest of the code generator, and simplifies a bit of code. This also allows MachineFunction to keep an MCContext reference handy, and cleans up the TargetRegistry interfaces for AsmPrinters. llvm-svn: 98450
* Fix LLVM build when the user specifies CPPFLAGS on the make command line.Jeffrey Yasskin2010-03-121-1/+1
| | | | llvm-svn: 98394
* inline GetGlobalValueSymbol into the rest its callers andChris Lattner2010-03-121-1/+2
| | | | | | remove it. llvm-svn: 98390
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-092-2/+2
| | | | | | | | | | is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. llvm-svn: 98086
* clean this up.Chris Lattner2010-03-061-6/+7
| | | | llvm-svn: 97870
* Sink InstructionSelect() out of each target into SDISel, and rename itChris Lattner2010-03-021-15/+1
| | | | | | | | | | | | DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader. Sink some other stuff out of DAGISelHeader into SDISel. Eliminate the various 'Indent' stuff from various targets, which dates to when isel was recursive. 17 files changed, 114 insertions(+), 430 deletions(-) llvm-svn: 97555
* Add explicit keywords.Dan Gohman2010-03-011-1/+1
| | | | llvm-svn: 97460
* Add JIT support to the TODO list (test commit)Nathan Keynes2010-03-011-0/+1
| | | | llvm-svn: 97443
* "Fix and issue in SparcAsmPrinter where multiple identical .LLGETPCHn ↵Chris Lattner2010-02-171-5/+6
| | | | | | symbols could be emitted in the same file (it was uniqued by block number, but not by function number). " Patch by Nathan Keynes! llvm-svn: 96495
* move isOnlyReachableByFallthrough out of MachineBasicBlock into AsmPrinter,Chris Lattner2010-02-171-0/+35
| | | | | | | and add a sparc implementation that knows about delay slots. Patch by Nathan Keynes! llvm-svn: 96492
* Move TLOF implementations to libCodegen to resolve layering violation.Anton Korobeynikov2010-02-151-1/+1
| | | | llvm-svn: 96288
* Remove an assumption of default arguments. This is in anticipation of aDavid Greene2010-02-151-18/+31
| | | | | | change to SelectionDAG build APIs. llvm-svn: 96237
* print all the newlines at the end of instructions withChris Lattner2010-02-101-1/+2
| | | | | | OutStreamer.AddBlankLine instead of textually. llvm-svn: 95734
* add support for the sparcv9-*-* target triple to turn onChris Lattner2010-02-047-29/+68
| | | | | | 64-bit sparc codegen. Patch by Nathan Keynes! llvm-svn: 95293
* rejigger the world so that EmitInstruction prints the \n atChris Lattner2010-02-031-0/+1
| | | | | | | | the end of the instruction instead of expecting the caller to do it. This currently causes the asm-verbose instruction comments to be on the next line. llvm-svn: 95178
* Revert 95130.Evan Cheng2010-02-022-2/+2
| | | | llvm-svn: 95160
* refactor code so that LLVMTargetMachine creates the asmstreamer and Chris Lattner2010-02-021-2/+3
| | | | | | | mccontext instead of having AsmPrinter do it. This allows other types of MCStreamer's to be passed in. llvm-svn: 95155
* Pass callsite return type to TargetLowering::LowerCall and use that to check ↵Evan Cheng2010-02-022-2/+2
| | | | | | sibcall eligibility. llvm-svn: 95130
* Switch MSP430, SPU, Sparc, and SystemZ to use EmitFunctionBody().Chris Lattner2010-01-281-56/+3
| | | | | | | Diffstat: 6 files changed, 30 insertions(+), 284 deletions(-) llvm-svn: 94727
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