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* Add dummy 'm' inline asm constraint handler for Sparc. I'm not sure, whether ↵Anton Korobeynikov2008-10-101-0/+26
| | | | | | it is correct, however :) llvm-svn: 57345
* CleanupAnton Korobeynikov2008-10-101-12/+12
| | | | llvm-svn: 57344
* Avoid creating two TargetLowering objects for each target.Dan Gohman2008-10-034-7/+11
| | | | | | | | | | | | Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. llvm-svn: 57016
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-033-20/+20
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Rename isWeakForLinker to mayBeOverridden. Use itDuncan Sands2008-09-291-1/+1
| | | | | | | instead of hasWeakLinkage in a bunch of optimization passes. llvm-svn: 56782
* CMake: Builds all targets.Oscar Fuentes2008-09-261-0/+24
| | | | llvm-svn: 56641
* Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.Anton Korobeynikov2008-09-241-3/+2
| | | | llvm-svn: 56573
* Drop obsolete hook and change all usage to new interfaceAnton Korobeynikov2008-09-241-7/+1
| | | | llvm-svn: 56572
* Fix these enums' starting values to reflect the way thatDan Gohman2008-09-231-1/+1
| | | | | | instruction opcodes are now numbered. No functionality change. llvm-svn: 56497
* Make log, log2, log10, exp, exp2 use Expand byDale Johannesen2008-09-221-10/+0
| | | | | | default. llvm-svn: 56471
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-162-5/+5
| | | | | | Apologies for the thrashing. llvm-svn: 56251
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-162-5/+5
| | | | | | | | | | - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. llvm-svn: 56249
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-131-4/+4
| | | | | | | | | isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
* Define CallSDNode, an SDNode subclass for use with ISD::CALL.Dan Gohman2008-09-131-11/+12
| | | | | | | | | | | | | Currently it just holds the calling convention and flags for isVarArgs and isTailCall. And it has several utility methods, which eliminate magic 5+2*i and similar index computations in several places. CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle nodes that are not CSE'd gracefully. llvm-svn: 56183
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-123-12/+17
| | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. llvm-svn: 56159
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-042-2/+2
| | | | llvm-svn: 55779
* Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen2008-09-041-0/+10
| | | | | | No functional change (and no FE change to generate them). llvm-svn: 55753
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-282-10/+10
| | | | | | Node to reflect semantics llvm-svn: 55504
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵Owen Anderson2008-08-262-5/+8
| | | | | | | | | requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. llvm-svn: 55375
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-3/+3
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-211-1/+1
| | | | | | from all targets. llvm-svn: 55124
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-214-5/+7
| | | | llvm-svn: 55092
* Add interface for section override. Use this for Sparc, since it should use ↵Anton Korobeynikov2008-08-161-0/+5
| | | | | | named BSS section. llvm-svn: 54844
* Reduce heap trashing due to std::string construction / concatenation via ↵Anton Korobeynikov2008-08-162-3/+3
| | | | | | caching of section flags string representations llvm-svn: 54842
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵Owen Anderson2008-08-142-2/+2
| | | | | | had to be propoagated down into all the targets and up into all clients of this API. llvm-svn: 54802
* Properly print flags on SparcAnton Korobeynikov2008-08-081-6/+5
| | | | llvm-svn: 54543
* Use mergeable strings sections on sparcAnton Korobeynikov2008-08-081-0/+1
| | | | llvm-svn: 54541
* Handle visibility printing with all generality. Remove bunch of duplicate code.Anton Korobeynikov2008-08-081-1/+5
| | | | llvm-svn: 54540
* Use EmitAlignment consistentlyAnton Korobeynikov2008-08-071-2/+1
| | | | llvm-svn: 54456
* CleanupAnton Korobeynikov2008-08-071-6/+6
| | | | llvm-svn: 54455
* Switch Sparc to new section handling stuff. Refactor printing of ↵Anton Korobeynikov2008-08-074-77/+120
| | | | | | module-level GVs significantly. llvm-svn: 54450
* Emit saveri with the correct operand order, patch by Richard Pennington!Chris Lattner2008-08-031-1/+1
| | | | llvm-svn: 54313
* Rename SDOperand to SDValue.Dan Gohman2008-07-273-104/+104
| | | | llvm-svn: 54128
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-171-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. llvm-svn: 53728
* Fix the build by adding a #include.Owen Anderson2008-07-101-0/+1
| | | | llvm-svn: 53388
* Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman2008-07-072-13/+13
| | | | | | | | | | | MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. llvm-svn: 53212
* Add explicit keywords.Dan Gohman2008-07-071-1/+1
| | | | llvm-svn: 53179
* - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, ↵Evan Cheng2008-07-031-7/+10
| | | | | | | | propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. - Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list. llvm-svn: 53097
* Add a new getMergeValues method that does not needDuncan Sands2008-07-021-3/+3
| | | | | | | | | | to be passed the list of value types, and use this where appropriate. Inappropriate places are where the value type list is already known and may be long, in which case the existing method is more efficient. llvm-svn: 53035
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-2/+4
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect itsDan Gohman2008-06-301-2/+2
| | | | | | | | | | | | | | | | | purpose, and give it a custom SDNode subclass so that it doesn't need to have line number, column number, filename string, and directory string, all existing as individual SDNodes to be the operands. This was the only user of ISD::STRING, StringSDNode, etc., so remove those and some associated code. This makes stop-points considerably easier to read in -view-legalize-dags output, and reduces overhead (creating new nodes and copying std::strings into them) on code containing debugging information. llvm-svn: 52924
* Split scheduling from instruction selection.Evan Cheng2008-06-301-7/+4
| | | | llvm-svn: 52923
* Replace some std::vectors that showed up in heap profiling withDan Gohman2008-06-302-7/+5
| | | | | | | | SmallVectors. Change the signature of TargetLowering::LowerArguments to avoid returning a vector by value, and update the two targets which still use this directly, Sparc and IA64, accordingly. llvm-svn: 52917
* Revert the SelectionDAG optimization that makesDuncan Sands2008-06-301-8/+4
| | | | | | | | | | | | | | | | | | it impossible to create a MERGE_VALUES node with only one result: sometimes it is useful to be able to create a node with only one result out of one of the results of a node with more than one result, for example because the new node will eventually be used to replace a one-result node using ReplaceAllUsesWith, cf X86TargetLowering::ExpandFP_TO_SINT. On the other hand, most users of MERGE_VALUES don't need this and for them the optimization was valuable. So add a new utility method getMergeValues for creating MERGE_VALUES nodes which by default performs the optimization. Change almost everywhere to use getMergeValues (and tidy some stuff up at the same time). llvm-svn: 52893
* Use MachineBasicBlock::transferSuccessors.Dan Gohman2008-06-211-8/+3
| | | | llvm-svn: 52594
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-12/+12
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* Add CommonLinkage; currently tentative definitionsDale Johannesen2008-05-141-2/+3
| | | | | | | | | | are represented as "weak", but there are subtle differences in some cases on Darwin, so we need both. The intent is that "common" will behave identically to "weak" unless somebody changes their target to do something else. No functional change as yet. llvm-svn: 51118
* Change target-specific classes to use more precise static types.Dan Gohman2008-05-142-3/+3
| | | | | | | This eliminates the need for several awkward casts, including the last dynamic_cast under lib/Target. llvm-svn: 51091
* Clean up the use of static and anonymous namespaces. This turned upDan Gohman2008-05-131-4/+2
| | | | | | | several things that were neither in an anonymous namespace nor static but not intended to be global. llvm-svn: 51017
* Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not LegalDan Gohman2008-04-121-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | on any current target and aren't optimized in DAGCombiner. Instead of using intermediate nodes, expand the operations, choosing between simple loads/stores, target-specific code, and library calls, immediately. Previously, the code to emit optimized code for these operations was only used at initial SelectionDAG construction time; now it is used at all times. This fixes some cases where rep;movs was being used for small copies where simple loads/stores would be better. This also cleans up code that checks for alignments less than 4; let the targets make that decision instead of doing it in target-independent code. This allows x86 to use rep;movs in low-alignment cases. Also, this fixes a bug that resulted in the use of rep;stos for memsets of 0 with non-constant memory size when the alignment was at least 4. It's better to use the library in this case, which can be significantly faster when the size is large. This also preserves more SourceValue information when memory intrinsics are lowered into simple loads/stores. llvm-svn: 49572
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