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authorDuncan Sands <baldrick@free.fr>2008-06-30 10:19:09 +0000
committerDuncan Sands <baldrick@free.fr>2008-06-30 10:19:09 +0000
commit1ae6ef83ee4a1625a1a037ff16442c56fdd81936 (patch)
tree0eb154b60b2abec1d01be6d747500b86bd3e205b /llvm/lib/Target/Sparc
parent5447e4331b9cb3277eb37ff91655a0526e79d334 (diff)
downloadbcm5719-llvm-1ae6ef83ee4a1625a1a037ff16442c56fdd81936.tar.gz
bcm5719-llvm-1ae6ef83ee4a1625a1a037ff16442c56fdd81936.zip
Revert the SelectionDAG optimization that makes
it impossible to create a MERGE_VALUES node with only one result: sometimes it is useful to be able to create a node with only one result out of one of the results of a node with more than one result, for example because the new node will eventually be used to replace a one-result node using ReplaceAllUsesWith, cf X86TargetLowering::ExpandFP_TO_SINT. On the other hand, most users of MERGE_VALUES don't need this and for them the optimization was valuable. So add a new utility method getMergeValues for creating MERGE_VALUES nodes which by default performs the optimization. Change almost everywhere to use getMergeValues (and tidy some stuff up at the same time). llvm-svn: 52893
Diffstat (limited to 'llvm/lib/Target/Sparc')
-rw-r--r--llvm/lib/Target/Sparc/SparcISelLowering.cpp12
1 files changed, 4 insertions, 8 deletions
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index 5c0617438c4..48b4fecbf79 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -450,8 +450,8 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
ResultVals.push_back(Chain);
// Merge everything together with a MERGE_VALUES node.
- return DAG.getNode(ISD::MERGE_VALUES, Op.Val->getVTList(),
- &ResultVals[0], ResultVals.size());
+ return DAG.getMergeValues(Op.Val->getVTList(), &ResultVals[0],
+ ResultVals.size());
}
@@ -829,8 +829,7 @@ static SDOperand LowerVAARG(SDOperand Op, SelectionDAG &DAG) {
DAG.getNode(ISD::BIT_CONVERT, MVT::f64, V),
V.getValue(1)
};
- return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(MVT::f64, MVT::Other),
- Ops, 2);
+ return DAG.getMergeValues(DAG.getVTList(MVT::f64, MVT::Other), Ops, 2);
}
static SDOperand LowerDYNAMIC_STACKALLOC(SDOperand Op, SelectionDAG &DAG) {
@@ -846,11 +845,8 @@ static SDOperand LowerDYNAMIC_STACKALLOC(SDOperand Op, SelectionDAG &DAG) {
// to provide a register spill area.
SDOperand NewVal = DAG.getNode(ISD::ADD, MVT::i32, NewSP,
DAG.getConstant(96, MVT::i32));
- std::vector<MVT> Tys;
- Tys.push_back(MVT::i32);
- Tys.push_back(MVT::Other);
SDOperand Ops[2] = { NewVal, Chain };
- return DAG.getNode(ISD::MERGE_VALUES, Tys, Ops, 2);
+ return DAG.getMergeValues(DAG.getVTList(MVT::i32, MVT::Other), Ops, 2);
}
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