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* Introduce MCCodeGenInfo, which keeps information that can affect codegenEvan Cheng2011-07-193-19/+33
* Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions forEvan Cheng2011-07-181-1/+0
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-183-17/+11
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-181-2/+2
* Move some parts of TargetAsmInfo down to MCAsmInfo. This is not the greatestEvan Cheng2011-07-151-0/+7
* Rename createAsmInfo to createMCAsmInfo and move registration code to MCTarge...Evan Cheng2011-07-146-10/+13
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-1410-42/+112
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-112-5/+16
* Change createAsmParser to take a MCSubtargetInfo instead of triple,Evan Cheng2011-07-091-0/+14
* Add an intrinsic and codegen support for fused multiply-accumulate. The intentCameron Zwarich2011-07-081-0/+2
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-082-2/+3
* Compute feature bits at time of MCSubtargetInfo initialization.Evan Cheng2011-07-072-3/+4
* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-014-5/+5
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-012-3/+3
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-012-1/+10
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-012-3/+6
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-304-16/+23
* Remove getRegClassForInlineAsmConstraint from sparc.Eric Christopher2011-06-292-24/+0
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-282-3/+3
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-284-6/+9
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-1/+1
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-275-9/+10
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-243-7/+9
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-151-18/+16
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-092-15/+3
* Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher2011-06-081-9/+9
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-302-0/+5
* Fix to match the dwarf register numbers that gdb uses.Rafael Espindola2011-05-291-16/+16
* Make the logic for determining function alignment more explicit. No function...Eli Friedman2011-05-062-8/+2
* Remove unused variables caught by GCC's -Wunused-but-set-variable.Benjamin Kramer2011-05-031-2/+0
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
* Revert r124611 - "Keep track of incoming argument's location while emitting L...Devang Patel2011-02-211-1/+1
* Generate correct Sparc32 ABI compliant code for functions that return a struct.Venkatraman Govindaraju2011-02-214-8/+84
* Use explicit add_subdirectory's for LLVM target sublibraries insteadOscar Fuentes2011-02-201-0/+2
* Swap VT and DebugLoc operands of getExtLoad() for consistency withStuart Hastings2011-02-161-1/+1
* Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend.Venkatraman Govindaraju2011-02-121-0/+3
* Keep track of incoming argument's location while emitting LiveIns.Devang Patel2011-01-311-1/+1
* Pass sret arguments through the stack instead of through registers in Sparc b...Venkatraman Govindaraju2011-01-223-4/+75
* Added ICC, FCC as uses of movcc instruction to generate correct code when -ma...Venkatraman Govindaraju2011-01-221-42/+51
* Sparc backend: Venkatraman Govindaraju2011-01-213-23/+28
* Implement support for byval arguments in Sparc backend.Venkatraman Govindaraju2011-01-211-1/+31
* Sparc backend: Implements a delay slot filler that attempt to fill delay slotsVenkatraman Govindaraju2011-01-202-8/+225
* SPARC backend: Modified LowerCall and LowerFormalArguments so that they use C...Venkatraman Govindaraju2011-01-182-272/+221
* Implement AnalyzeBranch in Sparc Backend.Venkatraman Govindaraju2011-01-162-7/+199
* Teach frame lowering to ignore debug values after the terminators.Jakob Stoklund Olesen2011-01-131-1/+1
* Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.Venkatraman Govindaraju2011-01-123-4/+85
* Remove SPARC backend getpcx instruction's Uses. Also, insert an assert to Venkatraman Govindaraju2011-01-122-3/+5
* Fix SPARC backend call instruction so that arguments passed through registersVenkatraman Govindaraju2011-01-122-11/+24
* SPARC backend: correct ICC/FCC uses for ADDX and SELECT_CCVenkatraman Govindaraju2011-01-111-15/+19
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