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path: root/llvm/lib/Target/Sparc/SparcRegisterInfo.td
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* Sparc: Support PSR, TBR, WIM read/write instructions.James Y Knight2015-05-181-0/+5
* Add support for the Sparc implementation-defined "ASR" registers.James Y Knight2015-05-181-0/+36
* [Sparc] Add register class for floating point conditional flags (%fcc0 - %fcc3).Venkatraman Govindaraju2014-03-021-4/+9
* Add a dwarf number to the Y register.Roman Divacky2014-02-241-1/+1
* [Sparc] Added V9's extra floating point registers and their aliases.Venkatraman Govindaraju2013-08-251-1/+49
* [Sparc] Use HWEncoding instead of unused Num field in Sparc register definiti...Venkatraman Govindaraju2013-08-201-10/+7
* Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,Venkatraman Govindaraju2013-06-041-18/+18
* Make SubRegIndex size mandatory, following r183020.Ahmed Bougacha2013-05-311-2/+2
* [Sparc] Add support for leaf functions in sparc backend. Venkatraman Govindaraju2013-05-291-14/+4
* [Sparc] Rearrange integer registers' allocation order so that register alloca...Venkatraman Govindaraju2013-05-191-6/+7
* Add 64-bit compare + branch for SPARC v9.Jakob Stoklund Olesen2013-04-031-1/+1
* Add an I64Regs register class for 64-bit registers.Jakob Stoklund Olesen2013-04-021-1/+11
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-3/+3
* Add a CoveredBySubRegs property to Register descriptions.Jakob Stoklund Olesen2012-01-181-0/+1
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-151-18/+16
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-091-15/+1
* Fix to match the dwarf register numbers that gdb uses.Rafael Espindola2011-05-291-16/+16
* Multiple SPARC backend fixes: added Y register; updated select_cc, subx, subx...Venkatraman Govindaraju2010-12-281-0/+3
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-0/+6
* Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen2010-05-261-6/+0
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-0/+6
* several major improvements to the sparc backend: support for weak linkageChris Lattner2009-09-151-2/+10
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-80/+80
* Fix for PR1540: Specify F0, F1 are sub-registers of D0, etc.Evan Cheng2007-07-131-2/+2
* Constify some methods. Patch provided by Anton Vayvod, thanks!Chris Lattner2006-08-171-2/+2
* D'oh - should be even numbered.Jim Laskey2006-03-241-15/+15
* Add dwarf register numbering to register data.Jim Laskey2006-03-241-31/+80
* Update to new-style flags usage, simplifying the .td fileChris Lattner2006-02-101-9/+0
* Rename SPARC V8 target to be the LLVM SPARC target.Chris Lattner2006-02-051-0/+118
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