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path: root/llvm/lib/Target/Sparc/SparcInstr.def
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* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-141-1/+1
* Remove all traces of the "Opcode Mask" field in the MachineInstr classChris Lattner2002-10-281-8/+0
* Fix misspellingChris Lattner2002-10-251-1/+1
* Don't mark JMPLCALL and JMPLRET as branches.Vikram S. Adve2002-10-131-4/+4
* Return address register should be marked as "result" for the JMPL instructionVikram S. Adve2002-09-281-3/+4
* BA has only one argument.Vikram S. Adve2002-07-081-8/+12
* Change latencies for Load, Store and Branch instructions.Vikram S. Adve2002-03-241-40/+42
* Change latency of SETX to improve schedule -- just a hack.Vikram S. Adve2001-11-141-1/+1
* Added M_PSEUDO_FLAG for SETX .. instrRuchira Sasanka2001-11-141-3/+3
* Fixed instruction information for RDCCR and WRCCR.Vikram S. Adve2001-11-041-4/+3
* Added code to support correct saving of %ccr across callsRuchira Sasanka2001-11-031-0/+6
* Add SETX instruction for 64-bit constants.Vikram S. Adve2001-10-281-8/+9
* Added SAVE and RESTORE. Duplicated JMPL into JMPLCALL and JMPLRET,Vikram S. Adve2001-10-221-1/+6
* Change latency of setuw and setsw to 2 cycles.Vikram S. Adve2001-09-301-4/+5
* Seperate instruction definitions into new SparcInstr.def fileChris Lattner2001-09-191-0/+440
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