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* [Sparc] Really add sparcel architecture support.Douglas Katzman2015-04-291-1/+1
| | | | | | | | Mostly copy-and-paste from Sparc v8 architecture. Differential Revision: http://reviews.llvm.org/D8741 llvm-svn: 236146
* Make Sparc assembler accept parenthesized constant expressions.Douglas Katzman2015-04-291-0/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D9087 llvm-svn: 236137
* Sparc: Prefer reg+reg address encoding when only one register used.James Y Knight2015-04-291-5/+5
| | | | | | | | | | | Reg+%g0 is preferred to Reg+imm0 by the manual, and is what GCC produces. Futhermore, reg+imm is invalid for the (not yet supported) "alternate address space" instructions. Differential Revision: http://reviews.llvm.org/D8753 llvm-svn: 236107
* Minor cleanup to all the switches after MatchInstructionImpl in all the ↵Craig Topper2015-01-031-4/+1
| | | | | | | | AsmParsers. Make sure they all have llvm_unreachable on the default path out of the switch. Remove unnecessary "default: break". Remove a 'return' after unreachable. Fix some indentation. llvm-svn: 225114
* TableGen: allow use of uint64_t for available features mask.Tim Northover2014-08-181-4/+4
| | | | | | | | | | ARM in particular is getting dangerously close to exceeding 32 bits worth of possible subtarget features. When this happens, various parts of MC start to fail inexplicably as masks get truncated to "unsigned". Mostly just refactoring at present, and there's probably no way to test. llvm-svn: 215887
* Replace some assert(0)'s with llvm_unreachable.Craig Topper2014-06-181-1/+1
| | | | llvm-svn: 211141
* AsmMatchers: Use unique_ptr to manage ownership of MCParsedAsmOperandDavid Blaikie2014-06-081-82/+69
| | | | | | | | | | | | I saw at least a memory leak or two from inspection (on probably untested error paths) and r206991, which was the original inspiration for this change. I ran this idea by Jim Grosbach a few weeks ago & he was OK with it. Since it's a basically mechanical patch that seemed sufficient - usual post-commit review, revert, etc, as needed. llvm-svn: 210427
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-14/+14
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Sparc edition llvm-svn: 207502
* [C++] Use 'nullptr'.Craig Topper2014-04-281-1/+1
| | | | llvm-svn: 207394
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-9/+9
| | | | llvm-svn: 207197
* Create MCTargetOptions.Evgeniy Stepanov2014-04-231-1/+2
| | | | | | | | | For now it contains a single flag, SanitizeAddress, which enables AddressSanitizer instrumentation of inline assembly. Patch by Yuri Gorshenin. llvm-svn: 206971
* LLVMBuild.txt: Reformat.NAKAMURA Takumi2014-04-101-1/+1
| | | | llvm-svn: 205961
* [Sparc] Add return/rett instruction to Sparc backend.Venkatraman Govindaraju2014-03-021-0/+6
| | | | llvm-svn: 202666
* [Sparc] Add support for parsing branches and conditional move instructions ↵Venkatraman Govindaraju2014-03-021-14/+3
| | | | | | with %fcc1-%fcc3 conditional registers. llvm-svn: 202616
* [Sparc] Add support for parsing fcmp with %fcc registers.Venkatraman Govindaraju2014-03-021-7/+14
| | | | llvm-svn: 202610
* [Sparc] Add register class for floating point conditional flags (%fcc0 - %fcc3).Venkatraman Govindaraju2014-03-021-2/+2
| | | | llvm-svn: 202604
* [Sparc] Add support for parsing annulled branch instructions.Venkatraman Govindaraju2014-03-011-0/+31
| | | | llvm-svn: 202599
* [Sparc] Add support for parsing sparcv9 instructions addc/subc/addccc/subccc.Venkatraman Govindaraju2014-03-011-6/+2
| | | | llvm-svn: 202598
* [Sparc] Teach SparcAsmParser to emit correct relocations for PIC code.Venkatraman Govindaraju2014-03-011-3/+51
| | | | llvm-svn: 202571
* [Sparc] Add support for parsing directives in SparcAsmParser.Venkatraman Govindaraju2014-03-011-2/+48
| | | | llvm-svn: 202564
* [Sparc] Emit correct encoding for atomic instructions. Also, add support for ↵Venkatraman Govindaraju2014-02-071-1/+18
| | | | | | parsing CAS instructions to test the CAS encoding. llvm-svn: 200963
* Change MCStreamer EmitInstruction interface to take subtarget infoDavid Woodhouse2014-01-281-1/+1
| | | | llvm-svn: 200345
* [Sparc] Correct quad register list in the asm parser.Venkatraman Govindaraju2014-01-241-1/+1
| | | | | | Add test cases to check parsing of v9 double registers and their aliased quad registers. llvm-svn: 199974
* Fix out of bounds access to the double regs array. Given theEric Christopher2014-01-231-1/+1
| | | | | | | code this looks correct, but could use review. The previous was definitely not correct. llvm-svn: 199940
* [Sparc] Add support for parsing floating point instructions.Venkatraman Govindaraju2014-01-121-23/+97
| | | | llvm-svn: 199033
* [Sparc] Add support for parsing jmpl instruction and make indirect call and ↵Venkatraman Govindaraju2014-01-101-0/+1
| | | | | | jmp instructions as aliases to jmpl. llvm-svn: 198909
* [Sparc] Add support for parsing branch instructions and conditional moves.Venkatraman Govindaraju2014-01-081-1/+21
| | | | llvm-svn: 198738
* [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc., Venkatraman Govindaraju2014-01-071-5/+35
| | | | | | Also, correct the offsets for FixupsKindInfo. llvm-svn: 198681
* [Sparc] Add support for parsing memory operands in sparc AsmParser.Venkatraman Govindaraju2014-01-071-47/+119
| | | | llvm-svn: 198658
* [Sparc] Add the initial implementation of an asm parser for sparc/sparcv9.Venkatraman Govindaraju2014-01-044-0/+655
llvm-svn: 198484
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