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path: root/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
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* [RISCV] Check the target-abi module flag matches the optionZakk Chen2020-01-271-2/+12
* CMake: Make most target symbols hidden by defaultTom Stellard2020-01-141-1/+1
* [RISCV] Enable the machine outliner for RISC-Vlewis-revill2019-12-191-0/+3
* [RISCV] Add subtargets initialized with target featureZakk Chen2019-12-171-2/+25
* Sink all InitializePasses.h includesReid Kleckner2019-11-131-0/+1
* [RISCV GlobalISel] Adding initial GlobalISel infrastructureDaniel Sanders2019-08-201-0/+29
* [llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere2019-08-151-1/+1
* [RISCV] Add RISCV-specific TargetTransformInfoSam Elliott2019-06-211-1/+8
* Revert CMake: Make most target symbols hidden by defaultTom Stellard2019-06-111-1/+1
* CMake: Make most target symbols hidden by defaultTom Stellard2019-06-101-1/+1
* [RISCV] Create a TargetInfo header. NFCRichard Trieu2019-05-151-0/+1
* [RISCV] Support -target-abi at the MC layer and for codegenAlex Bradbury2019-03-091-1/+1
* [RISCV][NFC] Move some std::string to StringRefAlex Bradbury2019-02-191-1/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [Targets] Add errors for tiny and kernel codemodel on targets that don't supp...David Green2018-12-071-7/+1
* [RISCV] Codegen for i8, i16, and i32 atomicrmw with RV32AAlex Bradbury2018-09-191-0/+10
* [RISCV] Add machine function pass to merge base + offsetSameer AbuAsal2018-06-271-0/+5
* [RISCV] Codegen support for atomic operations on RV32IAlex Bradbury2018-06-131-0/+6
* [RISCV] Use init_array instead of ctors for RISCV target, by defaultMandeep Singh Grang2018-03-241-1/+2
* [RISCV] Implement support for the BranchRelaxation passAlex Bradbury2018-01-101-0/+3
* [RISCV] Fix 64-bit data layout mismatch between backend and target descriptionMandeep Singh Grang2017-11-161-1/+1
* [RISCV] Initial codegen support for ALU operationsAlex Bradbury2017-10-191-2/+24
* Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"Matthias Braun2017-10-121-3/+3
* TargetMachine: Merge TargetMachine and LLVMTargetMachineMatthias Braun2017-10-121-3/+3
* Delete Default and JITDefault code modelsRafael Espindola2017-08-031-3/+10
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFCMatthias Braun2017-05-301-1/+1
* [RISCV] Fix RV32 datalayout string and ensure initAsmInfo is calledAlex Bradbury2017-02-141-2/+4
* [RISCV] Add stub backendAlex Bradbury2016-11-011-0/+58
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