| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV] Implement frame pointer elimination | Alex Bradbury | 2018-01-18 | 1 | -19/+22 |
| * | [RISCV] Reserve an emergency spill slot for the register scavenger when neces... | Alex Bradbury | 2018-01-11 | 1 | -0/+19 |
| * | [RISCV] Support stack frames and offsets up to 32-bits | Alex Bradbury | 2018-01-10 | 1 | -7/+23 |
| * | [RISCV] Support for varargs | Alex Bradbury | 2018-01-10 | 1 | -3/+12 |
| * | [RISCV] Implement prolog and epilog insertion | Alex Bradbury | 2017-12-11 | 1 | -2/+145 |
| * | [RISCV] Support lowering FrameIndex | Alex Bradbury | 2017-12-11 | 1 | -0/+29 |
| * | [RISCV] Initial codegen support for ALU operations | Alex Bradbury | 2017-10-19 | 1 | -0/+29 |

