| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV][NFC] Make logic in RISCVMCCodeEmitter::getImmOpValue more defensive | Alex Bradbury | 2018-02-22 | 1 | -5/+13 |
| * | [RISCV] Add support for %pcrel_lo. | Ahmed Charles | 2018-02-06 | 1 | -0/+5 |
| * | [RISCV] MC layer support for the jump/branch instructions of the RVC extension | Alex Bradbury | 2017-12-07 | 1 | -0/+4 |
| * | [RISCV] MC layer support for load/store instructions of the C (compressed) ex... | Alex Bradbury | 2017-12-07 | 1 | -3/+19 |
| * | [RISCV] Prepare for the use of variable-sized register classes | Alex Bradbury | 2017-10-19 | 1 | -1/+1 |
| * | [RISCV] Add common fixups and relocations | Alex Bradbury | 2017-09-28 | 1 | -6/+52 |
| * | [RISCV] Add support for disassembly | Alex Bradbury | 2017-09-17 | 1 | -0/+20 |
| * | [RISCV] Add support for all RV32I instructions | Alex Bradbury | 2017-09-17 | 1 | -0/+19 |
| * | Sort the remaining #include lines in include/... and lib/.... | Chandler Carruth | 2017-06-06 | 1 | -1/+1 |
| * | [RISCV] Add bare-bones RISC-V MCTargetDesc | Alex Bradbury | 2016-11-01 | 1 | -0/+91 |

