| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Rename DEBUG macro to LLVM_DEBUG. | Nicola Zaghen | 2018-05-14 | 1 | -3/+4 |
| * | [RISCV] Implement c.lui immediate operand constraint | Shiva Chen | 2018-02-22 | 1 | -0/+11 |
| * | [RISCV][NFC] Update RISCVInstrInfoC.td to match usual instruction naming conv... | Alex Bradbury | 2017-12-13 | 1 | -6/+8 |
| * | [RISCV] MC layer support for the remaining RVC instructions | Alex Bradbury | 2017-12-13 | 1 | -14/+66 |
| * | [RISCV] MC layer support for load/store instructions of the C (compressed) ex... | Alex Bradbury | 2017-12-07 | 1 | -13/+49 |
| * | [RISCV] MC layer support for the standard RV32D instruction set extension | Alex Bradbury | 2017-12-07 | 1 | -0/+25 |
| * | [RISCV] MC layer support for the standard RV32F instruction set extension | Alex Bradbury | 2017-12-07 | 1 | -0/+25 |
| * | [RISCV][NFC] Remove unnecessary {} around single statement if block | Alex Bradbury | 2017-11-21 | 1 | -2/+1 |
| * | [RISCV] Prepare for the use of variable-sized register classes | Alex Bradbury | 2017-10-19 | 1 | -8/+8 |
| * | [RISCV] Add support for disassembly | Alex Bradbury | 2017-09-17 | 1 | -0/+135 |
 |
index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
| summaryrefslogtreecommitdiffstats |
|