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* R600/SI: Limit SGPRs to 80 on Tonga and IcelandMarek Olsak2015-03-096-3/+45
| | | | | | This is a candidate for stable. llvm-svn: 231659
* R600/SI: Fix getNumSGPRsAllowed for VIMarek Olsak2015-03-092-12/+24
| | | | llvm-svn: 231658
* Make constant arrays that are passed to functions as const.Benjamin Kramer2015-03-071-7/+3
| | | | | | | | In theory this allows the compiler to skip materializing the array on the stack. In practice clang often fails to do that, but that's a different story. NFC. llvm-svn: 231571
* R600/SI: Remove unused register classTom Stellard2015-03-061-7/+0
| | | | llvm-svn: 231491
* Make DataLayout Non-Optional in the ModuleMehdi Amini2015-03-041-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: DataLayout keeps the string used for its creation. As a side effect it is no longer needed in the Module. This is "almost" NFC, the string is no longer canonicalized, you can't rely on two "equals" DataLayout having the same string returned by getStringRepresentation(). Get rid of DataLayoutPass: the DataLayout is in the Module The DataLayout is "per-module", let's enforce this by not duplicating it more than necessary. One more step toward non-optionality of the DataLayout in the module. Make DataLayout Non-Optional in the Module Module->getDataLayout() will never returns nullptr anymore. Reviewers: echristo Subscribers: resistor, llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D7992 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 231270
* R600/SI: Add an intrinsic for S_FLBIT_I32 / V_FFBH_I32Marek Olsak2015-03-043-1/+5
| | | | | | Required by OpenGL (ARB_gpu_shader5). llvm-svn: 231259
* R600: Use c++11 style for loopJan Vesely2015-03-021-6/+4
| | | | | | Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Tom Stellard <tom@stellard.net> llvm-svn: 230987
* Make some non-constant static variables non-static or fully const.Benjamin Kramer2015-03-011-4/+1
| | | | | | Otherwise we have to emit thread-safe initialization for them. NFC. llvm-svn: 230894
* ArrayRefize memory operand folding. NFC.Benjamin Kramer2015-02-282-21/+16
| | | | llvm-svn: 230846
* R600/SI: Add missing mubuf instructionsTom Stellard2015-02-272-9/+25
| | | | llvm-svn: 230759
* R600/SI: Consistently put soffset before the offset operand for mubuf ↵Tom Stellard2015-02-273-20/+20
| | | | | | | | instructions This matches the assembly syntax. llvm-svn: 230758
* R600/SI: Add slc, glc, and tfe to non-atomic _ADDR64 instructionsTom Stellard2015-02-274-17/+33
| | | | llvm-svn: 230757
* R600/SI: Remove M0 from DS assembly stringsTom Stellard2015-02-261-8/+8
| | | | | | This matches the assembly syntax for the proprietary compiler. llvm-svn: 230645
* Remove an argument-less call to getSubtargetImpl from TargetLoweringBase.Eric Christopher2015-02-262-2/+2
| | | | | | | | | This required plumbing a TargetRegisterInfo through computeRegisterProperties and into findRepresentativeClass which uses it for register class iteration. This required passing a subtarget into a few target specific initializations of TargetLowering. llvm-svn: 230583
* R600/SI: Remove isel mubuf legalizationTom Stellard2015-02-242-130/+0
| | | | | | | We legalize mubuf instructions post-instruction selection, so this code is no longer needed. llvm-svn: 230352
* R600/SI: Use v_madmk_f32Matt Arsenault2015-02-211-4/+51
| | | | llvm-svn: 230149
* R600/SI: Try to use v_madak_f32Matt Arsenault2015-02-212-0/+81
| | | | | | | This is a code size optimization when the constant only has one use. llvm-svn: 230148
* R600/SI: Don't crash when getting immediate operand sizeMatt Arsenault2015-02-211-0/+7
| | | | llvm-svn: 230147
* R600/SI: Fix mad*k definitionsMatt Arsenault2015-02-214-2/+40
| | | | llvm-svn: 230146
* CodeGen: convert CCState interface to using ArrayRefsTim Northover2015-02-211-2/+2
| | | | | | | | | | | Everyone except R600 was manually passing the length of a static array at each callsite, calculated in a variety of interesting ways. Far easier to let ArrayRef handle that. There should be no functional change, but out of tree targets may have to tweak their calls as with these examples. llvm-svn: 230118
* R600/SI: Remove v_sub_f64 pseudoMatt Arsenault2015-02-203-24/+5
| | | | | | | | | | The expansion code does the same thing. Since the operands were not defined with the correct types, this has the side effect of fixing operand folding since the expanded pseudo would never use SGPRs or inline immediates. llvm-svn: 230072
* R600: Use new fmad node.Matt Arsenault2015-02-207-41/+28
| | | | | | | | | | | This enables a few useful combines that used to only use fma. Also since v_mad_f32 apparently does not support denormals, disable the existing cases that are custom handled if they are requested. llvm-svn: 230071
* Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.Michael Kuperstein2015-02-192-3/+3
| | | | llvm-svn: 229841
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-02-192-3/+3
| | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. Differential Revision: http://reviews.llvm.org/D7065 llvm-svn: 229831
* Remove a few more calls to TargetMachine::getSubtarget from theEric Christopher2015-02-192-4/+4
| | | | | | R600 port. llvm-svn: 229804
* Grab the subtarget off of the machine function for the R600Eric Christopher2015-02-192-15/+14
| | | | | | asm printer and clean up a bunch of uses. llvm-svn: 229803
* Remove the DisasmEnabled AsmPrinter variable and just look itEric Christopher2015-02-193-6/+3
| | | | | | | up on the subtarget where it's set anyhow than looking it up 2-3 times in the same place. llvm-svn: 229802
* 80-column fixups.Eric Christopher2015-02-191-8/+7
| | | | llvm-svn: 229789
* R600/SI: Fix READLANE and WRITELANE lane select for VIMarek Olsak2015-02-182-6/+6
| | | | | | | | | | | | VOP2 declares vsrc1, but VOP3 declares src1. We can't use the same "ins" if the operands have different names in VOP2 and VOP3 encodings. This fixes a hang in geometry shaders which spill M0 on VI. (BTW it doesn't look like M0 needs spilling and the spilling seems duplicated 3 times) llvm-svn: 229752
* R600/SI: Simplify verification of AMDGPU::OPERAND_REG_INLINE_CMarek Olsak2015-02-181-8/+6
| | | | llvm-svn: 229751
* R600/SI: Remove explicit VOP operand checkingMarek Olsak2015-02-181-28/+0
| | | | | | This should be handled by the OperandType checking. llvm-svn: 229750
* R600/SI: Don't set isCodeGenOnly = 1 on all instructionsTom Stellard2015-02-184-5/+19
| | | | | | | We only need to set this on pseudo instructions which won't be used by the assembler. llvm-svn: 229689
* R600/SI: Add missing VOP1 instructionsTom Stellard2015-02-182-5/+18
| | | | llvm-svn: 229688
* R600/SI: Add missing VOP2 instructionsTom Stellard2015-02-181-2/+9
| | | | llvm-svn: 229687
* R600/SI: Add definition for S_CBRANCH_G_FORKTom Stellard2015-02-182-1/+13
| | | | llvm-svn: 229686
* R600/SI: Add missing SOP1 instructionsTom Stellard2015-02-182-12/+27
| | | | llvm-svn: 229685
* R600/SI: Refactor SOP2 definitionsTom Stellard2015-02-181-25/+17
| | | | llvm-svn: 229684
* R600/SI: Rename dst encoding field to be consistent with docsMatt Arsenault2015-02-182-4/+4
| | | | | | The docs call this vdst instead of just dst. llvm-svn: 229614
* R600/SI: Consistently capitalize encoding field namesMatt Arsenault2015-02-183-142/+119
| | | | | | | | | | Some formats capitalized these, but most didn't. Change them all to be consistently lowercase. Now, non-encoding fields and convenience bits are capitalized. Also remove weird looking empty line in some of the formats. llvm-svn: 229613
* R600/SI: Set noNamedPositionallyEncodedOperandsMatt Arsenault2015-02-181-0/+1
| | | | llvm-svn: 229612
* R600/SI: Fix src1_modifiers for class instructionsMatt Arsenault2015-02-181-2/+26
| | | | | | | | src1 doesn't have modifiers, but the operand was missing resulting in an encoding build error when all fields are required.' llvm-svn: 229611
* R600/SI: Fix not setting clamp / omod for v_cndmask_b32_e64Matt Arsenault2015-02-182-3/+5
| | | | | | | Rename the multiclass since it now applies to the output modifiers as well. llvm-svn: 229610
* R600: Fix operand encoding errorMatt Arsenault2015-02-181-0/+1
| | | | llvm-svn: 229609
* R600/SI: Fix encoding error from glc bit on VI SMRD instructionsMatt Arsenault2015-02-181-1/+5
| | | | llvm-svn: 229608
* R600/SI: Fix operand encoding for flat instructionsMatt Arsenault2015-02-181-2/+4
| | | | llvm-svn: 229607
* R600/SI: Fix error from vdst on no return atomicsMatt Arsenault2015-02-181-3/+5
| | | | | | | Set the ignored field to 0 so we can enable noNamedPositionallyEncodedOperands. llvm-svn: 229606
* R600/SI: Add missing offset operand to buffer bothenMatt Arsenault2015-02-182-4/+4
| | | | llvm-svn: 229605
* R600/SI: Add missing soffset operand to global atomicsMatt Arsenault2015-02-181-2/+2
| | | | llvm-svn: 229604
* R600/SI: Fix brace identationMatt Arsenault2015-02-181-1/+1
| | | | llvm-svn: 229603
* R600/SI: Fix asam errors in SIFoldOperandsTom Stellard2015-02-171-1/+2
| | | | | | | We were trying to fold into implicit uses, which led to out of bounds access of the MCInstrDesc::OpInfo arrray. llvm-svn: 229533
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