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* R600/SI: Select V_BFE_U32 for and+shift with a non-literal offsetMarek Olsak2015-03-243-15/+14
| | | | llvm-svn: 233079
* R600/SI: Custom-select 32-bit S_BFE from bitwise opcodesMarek Olsak2015-03-241-12/+104
| | | | llvm-svn: 233078
* R600/SI: Improve BFM supportMarek Olsak2015-03-242-3/+20
| | | | llvm-svn: 233077
* R600/SI: Use V_FRACT_F64 for faster 64-bit floor on SIMarek Olsak2015-03-244-1/+73
| | | | | | | Other f64 opcodes not supported on SI can be lowered in a similar way. v2: use complex VOP3 patterns llvm-svn: 233076
* R600/SI: Expand fract to floor, then only select V_FRACT on CIMarek Olsak2015-03-244-3/+32
| | | | | | | | | V_FRACT is buggy on SI. R600-specific code is left intact. v2: drop the multiclass, use complex VOP3 patterns llvm-svn: 233075
* Revert "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-03-241-2/+2
| | | | | | | | This reverts commit r233055. It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time. llvm-svn: 233068
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-03-241-2/+2
| | | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first time this was committed (r229831), it caused several buildbot failures. At least some of the ARM ones were due to gcc/binutils issues, and should now be fixed. Differential Revision: http://reviews.llvm.org/D8542 llvm-svn: 233055
* Refactor: Simplify boolean expressions in R600 targetDavid Blaikie2015-03-231-2/+2
| | | | | | | | | | Simplify boolean expressions with `true` and `false` using `clang-tidy` Patch by Richard Thomson. Differential Revision: http://reviews.llvm.org/D8520 llvm-svn: 233020
* Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.Benjamin Kramer2015-03-236-7/+9
| | | | llvm-svn: 232998
* R600/SI: Merge tables for commutingMatt Arsenault2015-03-233-32/+3
| | | | | | | Don't use a separate table for compares anymore, and use the same VOP2_REV class. llvm-svn: 232992
* R600/SI: Only use one range of isCommutable for comparesMatt Arsenault2015-03-231-38/+2
| | | | | | Also don't count the class instructions as isCompare anymore. llvm-svn: 232991
* R600/SI: Remove redundant unsetting of hasSideEffectsMatt Arsenault2015-03-231-2/+0
| | | | | | These are already set in the base class for the instruction. llvm-svn: 232990
* R600/SI: Move hasSideEffects setting into VOPCX classesMatt Arsenault2015-03-232-23/+19
| | | | llvm-svn: 232989
* R600/SI: Allow commuting comparesMatt Arsenault2015-03-234-100/+168
| | | | | | | | | | | | | | | | | This enables very common cases to switch to the smaller encoding. All of the standard LLVM canonicalizations of comparisons are the opposite of what we want. Compares with constants are moved to the RHS, but the first operand can be an inline immediate, literal constant, or SGPR using the 32-bit VOPC encoding. There are additional bad canonicalizations that should also be fixed, such as canonicalizing ge x, k to gt x, (k + 1) if this makes k no longer an inline immediate value. llvm-svn: 232988
* R600/SI: Use right class for cmpsx f64 instructionsMatt Arsenault2015-03-231-20/+20
| | | | | | Use VOPCX_F64 to not need the let Defs = [EXEC] llvm-svn: 232987
* R600/SI: Remove cond operand to VOPCX classesMatt Arsenault2015-03-231-8/+8
| | | | | | It isn't used, and these will probably never be directly selected. llvm-svn: 232986
* Purge unused includes throughout libSupport.Benjamin Kramer2015-03-232-1/+3
| | | | | | NFC. llvm-svn: 232976
* R600/SI: Fix crash in SIInstrInfo::areLoadsFromSameBasePtr()Tom Stellard2015-03-231-2/+10
| | | | | | | This function assumed that SMRD instructions always have immediate offsets, which is not always the case. llvm-svn: 232957
* Remove the target independent TargetMachine::getSubtarget andEric Christopher2015-03-211-1/+2
| | | | | | | | | | | | | | | | | | | TargetMachine::getSubtargetImpl routines. This keeps the target independent code free of bare subtarget calls while the remainder of the backends are migrated, or not if they don't wish to support per-function subtargets as would be needed for function multiversioning or LTO of disparate cpu subarchitecture types, e.g. clang -msse4.2 -c foo.c -emit-llvm -o foo.bc clang -c bar.c -emit-llvm -o bar.bc llvm-link foo.bc bar.bc -o baz.bc llc baz.bc and get appropriate code for what the command lines requested. llvm-svn: 232885
* Grab a subtarget off of an AMDGPUTargetMachine rather than aEric Christopher2015-03-211-11/+11
| | | | | | | bare target machine in preparation for the TargetMachine bare getSubtarget/getSubtargetImpl calls going away. llvm-svn: 232880
* R600/SI: Refactor VOP2 instruction defsTom Stellard2015-03-201-6/+13
| | | | llvm-svn: 232817
* R600/SI: Refactor VOP1 instruction defsTom Stellard2015-03-201-7/+12
| | | | llvm-svn: 232816
* [Tablegen] Attempt to add support for patterns containing nodes with ↵Craig Topper2015-03-201-6/+6
| | | | | | | | | | multiple results. This is needed for AVX512 masked scatter/gather support. The R600 change is necessary to remove a hack that was working around the lack of multiple results. llvm-svn: 232798
* two or more, use a for.Rafael Espindola2015-03-181-23/+13
| | | | llvm-svn: 232688
* Add a default implementation of createObjectStreamer.Rafael Espindola2015-03-181-10/+0
| | | | | | | This removes duplicated code from backends that don't need to do anything fancy. llvm-svn: 232658
* Make EmitFunctionHeader a private helper.Rafael Espindola2015-03-171-1/+0
| | | | llvm-svn: 232481
* Call EmitFunctionHeader just before EmitFunctionBody.Rafael Espindola2015-03-171-3/+1
| | | | | | | This avoids switching to .AMDGPU.config and back and hardcoding the section it switches back to. llvm-svn: 232479
* Pass in a "const Triple &T" instead of a raw StringRef.Rafael Espindola2015-03-161-1/+1
| | | | llvm-svn: 232429
* Remove unused argument. NFC.Rafael Espindola2015-03-161-3/+3
| | | | llvm-svn: 232428
* Fix uses of reserved identifiers starting with an underscore followed by an ↵David Blaikie2015-03-162-6/+5
| | | | | | | | | uppercase letter This covers essentially all of llvm's headers and libs. One or two weird cases I wasn't sure were worth/appropriate to fix. llvm-svn: 232394
* R600/SI: don't try min3/max3/med3 with f64Tom Stellard2015-03-161-0/+1
| | | | | | | | | | There are no opcodes for this. This also adds a test case. v2: make test more robust Patch by: Grigori Goronzy llvm-svn: 232386
* r600: Clear visited structure before running.Jan Vesely2015-03-131-0/+1
| | | | | | | | Fixes random crashes in for-loop piglit. Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Matt Arsenault <Matthew.Arsenault@amd.com> llvm-svn: 232181
* r600: Use deque and simplify loops in AMDGPUCFGStructurizerJan Vesely2015-03-131-10/+10
| | | | | | Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Matt Arsenault <Matthew.Arsenault@amd.com> llvm-svn: 232180
* R600/SI: Don't print scc reg in sopc assembly stringTom Stellard2015-03-121-1/+1
| | | | | | This is how the proprietary driver prints sopc instructions. llvm-svn: 232106
* R600/SI: Remove _e32 and _e64 suffixes from mnemonicsTom Stellard2015-03-125-25/+41
| | | | | | | | Instead print them as part of the $dst operand. The AsmMatcher requires the 32-bit and 64-bit encodings have the same mnemonic in order to parse them correctly. llvm-svn: 232105
* Move the DataLayout to the generic TargetMachine, making it mandatory.Mehdi Amini2015-03-122-10/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: I don't know why every singled backend had to redeclare its own DataLayout. There was a virtual getDataLayout() on the common base TargetMachine, the default implementation returned nullptr. It was not clear from this that we could assume at call site that a DataLayout will be available with each Target. Now getDataLayout() is no longer virtual and return a pointer to the DataLayout member of the common base TargetMachine. I plan to turn it into a reference in a future patch. The only backend that didn't have a DataLayout previsouly was the CPPBackend. It now initializes the default DataLayout. This commit is NFC for all the other backends. Test Plan: clang+llvm ninja check-all Reviewers: echristo Subscribers: jfb, jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D8243 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 231987
* Remove the need to cache the subtarget in the R600 TargetRegisterInfoEric Christopher2015-03-1112-66/+64
| | | | | | classes. llvm-svn: 231954
* Have getRegPressureSetLimit take a MachineFunction so that aEric Christopher2015-03-112-2/+4
| | | | | | we can inspect the subtarget and function when computing values. llvm-svn: 231951
* Remove the use of the subtarget in MCCodeEmitter creation andEric Christopher2015-03-104-5/+2
| | | | | | | update all ports accordingly. Required a couple of small rewrites in handling subtarget features during creation in PPC. llvm-svn: 231861
* Remove createAMDGPUMCCodeEmitter and instead just register the correctEric Christopher2015-03-103-16/+7
| | | | | | | MCCodeEmitter creation routine based on TargetMachine since the only 64-bit R600 gpus are part of the GCN target. llvm-svn: 231856
* R600/SI: Add _IDXEN and _BOTHEN variants for buffer_storeTom Stellard2015-03-101-0/+15
| | | | llvm-svn: 231798
* R600/SI: Re-order MUBUF operands to match asm strings.Tom Stellard2015-03-103-20/+19
| | | | llvm-svn: 231797
* R600/SI: Move kill flag to second instruction when splitting SMRDTom Stellard2015-03-101-5/+12
| | | | | | | This fixes a machine verifier error in the salu-to-valu.ll, which would have been exposed by a future commit. llvm-svn: 231796
* R600/SI: Add 32-bit encoding of v_cndmask_b32Tom Stellard2015-03-103-6/+25
| | | | | | | This was done by refactoring the v_cndmask_b32 tablegen definition to use inherit from VOP2Inst. llvm-svn: 231795
* DataLayout is mandatory, update the API to reflect it with references.Mehdi Amini2015-03-102-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Now that the DataLayout is a mandatory part of the module, let's start cleaning the codebase. This patch is a first attempt at doing that. This patch is not exactly NFC as for instance some places were passing a nullptr instead of the DataLayout, possibly just because there was a default value on the DataLayout argument to many functions in the API. Even though it is not purely NFC, there is no change in the validation. I turned as many pointer to DataLayout to references, this helped figuring out all the places where a nullptr could come up. I had initially a local version of this patch broken into over 30 independant, commits but some later commit were cleaning the API and touching part of the code modified in the previous commits, so it seemed cleaner without the intermediate state. Test Plan: Reviewers: echristo Subscribers: llvm-commits From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 231740
* TableGen: Use 'enum : uint64_t' for feature flags to fix -WmicrosoftReid Kleckner2015-03-091-0/+1
| | | | | | | | | | | | | clang-cl would warn that this value is not representable in 'int': enum { FeatureX = 1ULL << 31 }; All MS enums are 'ints' unless otherwise specified, so we have to use an explicit type. The AMDGPU target just hit 32 features, triggering this warning. Now that we have C++11 strong enum types, we can also eliminate the 'const uint64_t' codepath from tablegen and just use 'enum : uint64_t'. llvm-svn: 231697
* R600/SI: Move gds operand to the end of operand listTom Stellard2015-03-095-34/+44
| | | | | | Also print it in the assembly string. llvm-svn: 231684
* R600/SI: Refactor DS instruction defsTom Stellard2015-03-093-188/+130
| | | | llvm-svn: 231683
* R600/SI: Fix DS definitions and add missing instructionsTom Stellard2015-03-092-44/+139
| | | | llvm-svn: 231663
* R600/SI: Fix opcode for ds_read2_b64 and ds_read2st64_b64Tom Stellard2015-03-091-2/+2
| | | | llvm-svn: 231662
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