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path: root/llvm/lib/Target/R600/SIRegisterInfo.cpp
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* R600/SI: Choose the correct MOV instruction for copying immediatesTom Stellard2013-08-141-0/+11
| | | | | | | | The instruction selector will now try to infer the destination register so it can decided whether to use V_MOV_B32 or S_MOV_B32 when copying immediates. llvm-svn: 188426
* R600/SI: Add more special cases for opcodes to ensureSRegLimit()Tom Stellard2013-08-061-0/+21
| | | | | | Also factor out the register class lookup to its own function. llvm-svn: 187830
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-5/+3
| | | | | | | | the internals of TargetMachine could change. No functionality change intended. llvm-svn: 183561
* R600/SI: switch back to RegPressure schedulingChristian Konig2013-03-261-0/+5
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> llvm-svn: 178021
* Add R600 backendTom Stellard2012-12-111-0/+48
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX llvm-svn: 169915
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