summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/R600/SIMachineFunctionInfo.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Remove a few more calls to TargetMachine::getSubtarget from theEric Christopher2015-02-191-3/+3
| | | | | | R600 port. llvm-svn: 229804
* R600/SI: Spill VGPRs to scratch space for compute shadersTom Stellard2015-01-141-1/+2
| | | | llvm-svn: 225988
* R600/SI: Implement VGPR register spilling for compute at -O0 v3Tom Stellard2014-09-241-18/+16
| | | | | | | | | | | | | | VGPRs are spilled to LDS. This still needs more testing, but we need to at least enable it at -O0, because the fast register allocator spills all registers that are live at the end of blocks and without this some future commits will break the flat-address-space.ll test. v2: Only calculate thread id once v3: Move insertion of spill instructions to SIRegisterInfo::eliminateFrameIndex() llvm-svn: 218348
* R600/SI: Remove unused SGPR spilling codeTom Stellard2014-08-211-61/+0
| | | | llvm-svn: 216218
* R600/SI: Use eliminateFrameIndex() to expand SGPR spill pseudosTom Stellard2014-08-211-3/+45
| | | | | | | | | | | | | | | This will simplify the SGPR spilling and also allow us to use MachineFrameInfo for calculating offsets, which should be more reliable than our custom code. This fixes a crash in some cases where a register would be spilled in a branch such that the VGPR defined for spilling did not dominate all the uses when restoring. This fixes a crash in an ocl conformance test. The test requries register spilling and is too big to include. llvm-svn: 216217
* R600/SI: Use scratch memory for large private arraysTom Stellard2014-07-211-1/+2
| | | | llvm-svn: 213551
* Fix typo, weird indentationMatt Arsenault2014-07-071-2/+4
| | | | llvm-svn: 212472
* Fix grammarMatt Arsenault2014-07-051-1/+1
| | | | llvm-svn: 212379
* R600/SI: Only create one instruction when spilling/restoring register v3Tom Stellard2014-05-021-9/+48
| | | | | | | | | | | | | | | | | | The register spiller assumes that only one new instruction is created when spilling and restoring registers, so we need to emit pseudo instructions for vector register spills and lower them after register allocation. v2: - Fix calculation of lane index - Extend VGPR liveness to end of program. v3: - Use SIMM16 field of S_NOP to specify multiple NOPs. https://bugs.freedesktop.org/show_bug.cgi?id=75005 llvm-svn: 207843
* R600/SI: Implement spilling of SGPRs v5Tom Stellard2013-11-271-1/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | SGPRs are spilled into VGPRs using the {READ,WRITE}LANE_B32 instructions. v2: - Fix encoding of Lane Mask - Use correct register flags, so we don't overwrite the low dword when restoring multi-dword registers. v3: - Register spilling seems to hang the GPU, so replace all shaders that need spilling with a dummy shader. v4: - Fix *LANE definitions - Change destination reg class for 32-bit SMRD instructions v5: - Remove small optimization that was crashing Serious Sam 3. https://bugs.freedesktop.org/show_bug.cgi?id=68224 https://bugs.freedesktop.org/show_bug.cgi?id=71285 NOTE: This is a candidate for the 3.4 branch. llvm-svn: 195880
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-0/+4
| | | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. The memory leaks in this version have been fixed. Thanks Alexey for pointing them out. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy llvm-svn: 195064
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-4/+0
| | | | | | | | | | | | This change is incorrect. If you delete virtual destructor of both a base class and a subclass, then the following code: Base *foo = new Child(); delete foo; will not cause the destructor for members of Child class. As a result, I observe plently of memory leaks. Notable examples I investigated are: ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl. llvm-svn: 194997
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-0/+4
| | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy llvm-svn: 194865
* R600/SI: Share code recording ShaderTypeAttribute between generationsVincent Lejeune2013-04-011-18/+2
| | | | llvm-svn: 178504
* R600/SI: rework input interpolation v2Christian Konig2013-03-071-2/+2
| | | | | | | | v2: update CMakeLists.txt as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 176626
* R600/SI: remove shader type intrinsicChristian Konig2013-03-071-2/+16
| | | | | | | | Just encode the type as target specific attribute. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 176622
* Add R600 backendTom Stellard2012-12-111-0/+20
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX llvm-svn: 169915
OpenPOWER on IntegriCloud