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path: root/llvm/lib/Target/R600/SIInsertWaits.cpp
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* R600/SI: Insert s_waitcnt before s_barrier instructions.Tom Stellard2015-01-061-1/+5
| | | | | | | This ensures that all memory operations are complete when all threads reach the barrier. llvm-svn: 225290
* R600/SI: Fix dependency calculation for DS writes instructions in SIInsertWaitsTom Stellard2015-01-061-0/+23
| | | | | | | | | | | | In DS write instructions, the address operand comes before the value operand(s) which is reversed from every other instruction type. The SIInsertWait assumed that the first use for each instruction was the value, so for DS write it was protecting the address operand with s_waitcnt instructions when it should have been protecting the value operand. llvm-svn: 225289
* R600/SI: Disable VMEM and SMEM clauses by breaking them with S_NOPMarek Olsak2014-12-071-8/+46
| | | | | | This is only a workaround. llvm-svn: 223615
* Fix include orderMatt Arsenault2014-09-291-1/+1
| | | | llvm-svn: 218611
* R600/SI: Fix hardcoded values for modifiers.Matt Arsenault2014-09-291-0/+1
| | | | | | Move enums to SIDefines.h llvm-svn: 218610
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-4/+3
| | | | | | | | | | | shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lookups from the MachineFunction easily. Update the MIPS subtarget switching machinery to update this pointer at the same time it runs. llvm-svn: 214838
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-2/+5
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* Fix typosMatt Arsenault2014-07-171-3/+3
| | | | llvm-svn: 213285
* R600/SI: Add intrinsics for various math instructions.Matt Arsenault2014-06-191-0/+2
| | | | | | | | These will be used for custom lowering and for library implementations of various math functions, so it's useful to expose these as builtins. llvm-svn: 211247
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-2/+2
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. R600 edition llvm-svn: 207503
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-2/+2
| | | | llvm-svn: 207197
* R600/SI: Add intrinsic for S_SENDMSG instructionMichel Danzer2014-01-271-0/+6
| | | | | Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 200195
* R600/SI: Add support for private address space load/storeTom Stellard2013-11-131-1/+1
| | | | | | | Private address space is emulated using the register file with MOVRELS and MOVRELD instructions. llvm-svn: 194626
* R600/SI: Fix broken encoding of DS_WRITE_B32Michel Danzer2013-08-161-8/+13
| | | | | | | | | | | | | | The logic in SIInsertWaits::getHwCounts() only really made sense for SMRD instructions, and trying to shoehorn it into handling DS_WRITE_B32 caused it to corrupt the encoding of that by clobbering the first operand with the second one. Undo that damage and only apply the SMRD logic to that. Fixes some derivates related piglit regressions with radeonsi. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 188558
* Revert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions"Tom Stellard2013-08-161-1/+3
| | | | | | | This reverts commit a6a39ced095c2f453624ce62c4aead25db41a18f. This is the wrong version of this fix. llvm-svn: 188523
* R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructionsTom Stellard2013-08-161-3/+1
| | | | | | | | | The SIInsertWaits pass was overwriting the first operand (gds bit) of DS_WRITE_B32 with the second operand (value to write). This meant that any time the value to write was stored in an odd number VGPR, the gds bit would be set causing the instruction to write to GDS instead of LDS. llvm-svn: 188522
* Initialize SIInsertWaits::ExpInstrTypesSeen in the pass constructor.Evgeniy Stepanov2013-08-071-1/+2
| | | | | | | This value may be used uninitialized in SIInsertWaits::insertWait. Found with MemorySanitizer. llvm-svn: 187869
* R600/SI: Initial support for LDS/GDS instructionsMichel Danzer2013-07-101-0/+2
| | | | | Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 186009
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-7/+9
| | | | | | | | the internals of TargetMachine could change. No functionality change intended. llvm-svn: 183561
* R600/SI: fix inserting waits for all definesChristian Konig2013-03-181-15/+1
| | | | | | | | | | Unfortunately the previous fix for inserting waits for unordered defines wasn't sufficient, cause it's possible that even ordered defines are only partially used (or not used at all). Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 177271
* R600/SI: fix inserting waits for unordered definesChristian Konig2013-03-011-2/+21
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> llvm-svn: 176342
* R600: Proper insert S_WAITCNT instructionsTom Stellard2013-01-181-0/+353
Some instructions like memory reads/writes are executed asynchronously, so we need to insert S_WAITCNT instructions to block before accessing their results. Previously we have just inserted S_WAITCNT instructions after each async instruction, this patch fixes this and adds a prober insertion pass. Patch by: Christian König Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> llvm-svn: 172846
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