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path: root/llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp
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* R600: Use LDS and vectors for private memoryTom Stellard2014-06-171-1/+7
* R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtargetTom Stellard2014-06-131-0/+1
* R600/SI: Fix selection failure on scalar_to_vectorMatt Arsenault2014-06-111-5/+21
* R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0Tom Stellard2014-05-151-5/+6
* R600/SI: Only select SALU instructions in the entry or exit blockTom Stellard2014-04-291-0/+15
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper2014-04-291-3/+3
* Convert SelectionDAG::SelectNodeTo to use ArrayRef.Craig Topper2014-04-271-3/+3
* R600: Minor cleanups.Matt Arsenault2014-04-181-55/+50
* R600/SI: Try to use scalar BFE.Matt Arsenault2014-04-181-5/+43
* R600/SI: Use SReg_64 instead of VSrc_64 when selecting BUILD_PAIRTom Stellard2014-04-181-1/+1
* Break PseudoSourceValue out of the Value hierarchy. It is now the root of its...Nick Lewycky2014-04-151-22/+35
* R600: Match 24-bit arithmetic patterns in a Target DAGCombineTom Stellard2014-04-071-46/+0
* R600: Replace dyn_cast + assert with castTom Stellard2014-04-071-2/+1
* R600/SI: Lower 64-bit immediates using REG_SEQUENCETom Stellard2014-04-031-0/+38
* [Modules] Move ValueMap to the IR library. While this class does notChandler Carruth2014-03-041-1/+1
* R600/SI: Custom select 64-bit ADDTom Stellard2014-02-251-0/+48
* R600/SI: Add support for private address space load/storeTom Stellard2013-11-131-0/+34
* ISelDAG: spot chain cycles involving MachineNodesTim Northover2013-09-221-0/+1
* R600: Move clamp handling code to R600IselLowering.cppVincent Lejeune2013-09-121-33/+1
* R600: Move code handling literal folding into R600ISelLowering.Vincent Lejeune2013-09-121-105/+0
* R600: Move fabs/fneg/sel folding logic into PostProcessIselVincent Lejeune2013-09-121-245/+17
* Mark an unreachable code path with llvm_unreachable. Pacifies GCC.Benjamin Kramer2013-08-311-0/+1
* R600: Enable folding of inline literals into REQ_SEQUENCE instructionsTom Stellard2013-08-161-17/+20
* Tentative fix for global-buffer-overflow caused by r188426. Found by AddressS...Alexey Samsonov2013-08-151-1/+4
* R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2Tom Stellard2013-08-141-19/+69
* R600/SI: Choose the correct MOV instruction for copying immediatesTom Stellard2013-08-141-0/+29
* R600/SI: Use VSrc_* register classes as the default classes for typesTom Stellard2013-08-061-23/+1
* R600: Add 64-bit float load/store supportTom Stellard2013-08-011-1/+8
* R600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS loads when necessaryTom Stellard2013-07-231-0/+7
* R600: Add support for 24-bit MUL instructionsTom Stellard2013-07-231-1/+49
* R600: Rename AMDILISelDAGToDAG.cpp -> AMDGPUISelDAGToDAG.cppTom Stellard2013-07-231-0/+789
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