| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [PowerPC] Fix a DAG replacement bug in PPCTargetLowering::DAGCombineExtBoolTrunc | Hal Finkel | 2016-05-12 | 1 | -10/+19 |
| * | CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC | Matthias Braun | 2016-05-10 | 1 | -0/+1 |
| * | [Power9] Add support for -mcpu=pwr9 in the back end | Nemanja Ivanovic | 2016-05-09 | 8 | -6/+26 |
| * | [PowerPC] fix register alignment for long double type | Strahinja Petrovic | 2016-05-09 | 6 | -4/+101 |
| * | SDAG: Rename Select->SelectImpl and repurpose Select as returning void | Justin Bogner | 2016-05-05 | 1 | -4/+3 |
| * | [PowerPC] Generate VSX version of splat word | Nemanja Ivanovic | 2016-05-04 | 5 | -7/+37 |
| * | [PowerPC/QPX] Fix the load/splat peephole with overlapping reads | Hal Finkel | 2016-04-30 | 1 | -1/+9 |
| * | [PPC] Enable shuffling of VSX vectors | Guozhi Wei | 2016-04-29 | 1 | -4/+2 |
| * | LiveIntervalAnalysis: Remove LiveVariables requirement | Matthias Braun | 2016-04-28 | 1 | -1/+8 |
| * | [PowerPC] Fix the EH_SjLj_Setup pseudo. | Marcin Koscielnicki | 2016-04-28 | 2 | -1/+6 |
| * | This reverts commit r265505. | Kit Barton | 2016-04-28 | 7 | -268/+0 |
| * | [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLowering... | Craig Topper | 2016-04-28 | 1 | -6/+0 |
| * | Add optimization bisect opt-in calls for PowerPC passes | Andrew Kaylor | 2016-04-27 | 9 | -3/+28 |
| * | [ppc64] fix bug in prologue that mfocrf's cr operand should be explict state ... | Chuang-Yu Cheng | 2016-04-27 | 1 | -4/+10 |
| * | [CodeGen] Add getBuildVector and getSplatBuildVector helpers. NFCI. | Ahmed Bougacha | 2016-04-26 | 1 | -5/+3 |
| * | [PowerPC] Add support for llvm.thread.pointer | Marcin Koscielnicki | 2016-04-26 | 1 | -0/+10 |
| * | [ppc64] Reenable sibling call optimization on ppc64 since fixed tsan library ... | Chuang-Yu Cheng | 2016-04-26 | 1 | -1/+1 |
| * | Remove MinLatency in SchedMachineModel. NFC. | Junmo Park | 2016-04-26 | 7 | -7/+0 |
| * | [PowerPC] [PR27387] Disallow r0 for ADD8TLS. | Marcin Koscielnicki | 2016-04-25 | 1 | -2/+4 |
| * | Minor code cleanups. NFC. | Junmo Park | 2016-04-25 | 4 | -23/+23 |
| * | [PowerPC] [SSP] Fix stack guard load for 32-bit. | Marcin Koscielnicki | 2016-04-21 | 1 | -1/+1 |
| * | [PPC, SSP] Support PowerPC Linux stack protection. | Tim Shen | 2016-04-19 | 5 | -0/+37 |
| * | [NFC] Header cleanup | Mehdi Amini | 2016-04-18 | 7 | -17/+6 |
| * | Fix typing on generated LXV2DX/STXV2DX instructions | Nirav Dave | 2016-04-15 | 1 | -5/+23 |
| * | [PowerPC] Basic support for P9 byte comparison and count trailing zero insns | Nemanja Ivanovic | 2016-04-13 | 5 | -8/+75 |
| * | [PPC64] Mark CR0 Live if PPCInstrInfo::optimizeCompareInstr Creates a Use of CR0 | Chuang-Yu Cheng | 2016-04-12 | 1 | -0/+4 |
| * | [PPC64] Use mfocrf in prologue when we only need to save 1 nonvolatile CR field | Chuang-Yu Cheng | 2016-04-12 | 1 | -8/+16 |
| * | CXX_FAST_TLS calling convention: performance improvement for PPC64 | Chuang-Yu Cheng | 2016-04-08 | 7 | -1/+137 |
| * | [PPC] Enable transformations in PPCPassConfig::addIRPasses at O2 | Ehsan Amiri | 2016-04-07 | 1 | -1/+1 |
| * | NFC: make AtomicOrdering an enum class | JF Bastien | 2016-04-06 | 1 | -3/+3 |
| * | [PPC] Use VSX/FP Facility integer load when an integer load's only users are ... | Ehsan Amiri | 2016-04-06 | 1 | -1/+26 |
| * | [ppc64] Temporary disable sibling call optimization on ppc64 due to breaking ... | Chuang-Yu Cheng | 2016-04-06 | 1 | -1/+1 |
| * | RegisterScavenger: Take a reference as enterBasicBlock() argument. | Matthias Braun | 2016-04-06 | 1 | -1/+1 |
| * | [ppc64] Enable sibling call optimization on ppc64 ELFv1/ELFv2 abi | Chuang-Yu Cheng | 2016-04-06 | 2 | -7/+228 |
| * | [Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random nu... | Chuang-Yu Cheng | 2016-04-06 | 7 | -0/+269 |
| * | [Power9] Implement copy-paste, msgsync, slb, and stop instructions | Chuang-Yu Cheng | 2016-04-06 | 6 | -0/+109 |
| * | Add MachineFunctionProperty checks for AllVRegsAllocated for target passes | Derek Schuff | 2016-04-04 | 2 | -2/+10 |
| * | [PPC64] Bug fix: when enabling sibling-call-opt and shrink-wrapping, the tail... | Chuang-Yu Cheng | 2016-04-01 | 2 | -26/+62 |
| * | [PowerPC] Add a late MI-level pass for QPX load/splat simplification | Hal Finkel | 2016-03-31 | 5 | -4/+170 |
| * | Change eliminateCallFramePseudoInstr() to return an iterator | Hans Wennborg | 2016-03-31 | 2 | -5/+5 |
| * | [PPC] basic support for Power 9 direct move instructions | Ehsan Amiri | 2016-03-31 | 1 | -2/+17 |
| * | [PowerPC] Correctly compute 64-bit offsets in fast isel | Ulrich Weigand | 2016-03-31 | 1 | -6/+5 |
| * | [PowerPC] Basic support for P9 atomic loads and stores | Nemanja Ivanovic | 2016-03-31 | 7 | -0/+66 |
| * | [PowerPC] Remove incorrect use of COPY_TO_REGCLASS in fast isel | Ulrich Weigand | 2016-03-31 | 3 | -20/+3 |
| * | [PowerPC] Load two floats directly instead of using one 64-bit integer load | Hal Finkel | 2016-03-31 | 1 | -0/+105 |
| * | Remove HasFnAttribute guards to getFnAttribute calls | Nirav Dave | 2016-03-30 | 1 | -2/+1 |
| * | [PPC] Remove -ppc-loop-prefetch-distance in favor of -prefetch-distance | Adam Nemet | 2016-03-29 | 1 | -7/+5 |
| * | [PowerPC] Refactor popcnt[dw] target features | Hal Finkel | 2016-03-29 | 5 | -18/+28 |
| * | [PowerPC] Clarify a comment in PPCTTI about vector loads | Hal Finkel | 2016-03-28 | 1 | -1/+1 |
| * | [PowerPC] On the A2, popcnt[dw] are very slow | Hal Finkel | 2016-03-28 | 5 | -6/+16 |
