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path: root/llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp
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* Rename PowerPC*.h to PPC*.hChris Lattner2005-10-141-184/+0
| | | | llvm-svn: 23743
* Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachineChris Lattner2005-10-141-1/+0
| | | | | | still should be merged into the PPC32TargetMachine class llvm-svn: 23741
* Make the JIT default to the DAG isel instead of the pattern isel, like LLC.Chris Lattner2005-09-291-1/+4
| | | | | | | | | The Pattern isel has some strange memory corruption issues going on. :( This should have been converted over anyway, but it got forgotten somehow when switching to the dag isel. llvm-svn: 23523
* Move the post-lsr simplify cfg pass after lowereh, so it can clean up afterChris Lattner2005-09-271-2/+6
| | | | | | eh lowering as well. llvm-svn: 23459
* turn on dag isel by defaultChris Lattner2005-09-021-3/+3
| | | | llvm-svn: 23226
* 1. Use SubtargetFeatures in llc/lli.Jim Laskey2005-09-011-3/+5
| | | | | | | | 2. Propagate feature "string" to all targets. 3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget. llvm-svn: 23192
* Remove the X86 and PowerPC Simple instruction selectors; their time hasNate Begeman2005-08-181-13/+4
| | | | | | passed. llvm-svn: 22886
* add a beta option for turning on dag->dag iselChris Lattner2005-08-171-3/+9
| | | | llvm-svn: 22837
* Turn loop strength reduction on by default.Chris Lattner2005-08-151-20/+14
| | | | | | | Only run createLowerConstantExpressionsPass for the simple isel. The DAG isel has no need for it. llvm-svn: 22794
* Remove support for 64b PPC, it's been broken for a long time. It'll beNate Begeman2005-08-131-36/+2
| | | | | | back once a DAG->DAG ISel exists. llvm-svn: 22778
* Consolidate the GPOpt stuff to all use the Subtarget, instead of stillChris Lattner2005-08-051-21/+4
| | | | | | | | depending on the command line option. Now the command line option just sets the subtarget as appropriate. G5 opts will now default to on on G5-enabled nightly testers among other machines. llvm-svn: 22688
* don't crash when running the PPC backend on non-ppc hosts without specifyingChris Lattner2005-08-051-3/+1
| | | | | | a subtarget. llvm-svn: 22677
* Use the new subtarget support to automatically choose the correct ABINate Begeman2005-08-041-6/+28
| | | | | | and asm printer for PowerPC if one is not specified. llvm-svn: 22659
* Add Subtarget support to PowerPC. Next up, using it.Nate Begeman2005-08-041-4/+4
| | | | llvm-svn: 22644
* Eliminate all remaining tabs and trailing spaces.Jeff Cohen2005-07-271-1/+1
| | | | llvm-svn: 22523
* Support building non-PICNate Begeman2005-07-211-2/+10
| | | | | | | | Remove the LoadHiAddr pseudo-instruction. Optimization of stores to and loads from statics. Force JIT to use new non-PIC codepaths. llvm-svn: 22494
* revert to using 4-byte alignment for doubles, as specified by the ABIChris Lattner2005-07-211-1/+1
| | | | llvm-svn: 22493
* Generate mfocrf when targeting g5. Generate fsqrt/fsqrts when targetin g5.Nate Begeman2005-07-201-2/+2
| | | | | | 8-byte align doubles. llvm-svn: 22486
* Integrate SelectFPExpr into SelectExpr. This gets PPC32 closer to beingNate Begeman2005-07-191-6/+0
| | | | | | automatically generated from a target description. llvm-svn: 22470
* Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFileChris Lattner2005-06-251-4/+7
| | | | | | interface. llvm-svn: 22282
* Remove trailing whitespaceMisha Brukman2005-04-211-16/+16
| | | | llvm-svn: 21425
* Make pattern isel default for ppcNate Begeman2005-04-151-8/+21
| | | | | | | | | | Add new ppc beta option related to using condition registers Make pattern isel control flag (-enable-pattern-isel) global and tristate 0 == off 1 == on 2 == target default llvm-svn: 21309
* Remove 64 bit simple ISel, it never worked correctlyNate Begeman2005-04-051-1/+1
| | | | | | Add initial (buggy) implementation of 64 bit pattern ISel llvm-svn: 21096
* Implement more of the PPC32 Pattern ISel:Nate Begeman2005-03-241-2/+2
| | | | | | | | | | | | | 1) dynamic stack alloc 2) loads 3) shifts 4) subtract 5) immediate form of add, and, or, xor 6) change flag from -pattern-isel to -enable-ppc-pattern-isel Remove dead arguments from getGlobalBaseReg in the simple ISel llvm-svn: 20810
* Addition of the PPC32 Pattern ISel. While it is far from complete, it willNate Begeman2005-03-241-0/+4
| | | | | | | be brought up to parity with the current simple ISel in the coming days. Currently, -pattern-isel is required to trigger it. llvm-svn: 20805
* cleanup the cfg after lsrChris Lattner2005-03-021-2/+6
| | | | llvm-svn: 20410
* Add a temporary option for llc-beta: -enable-lsr-for-ppc, which turns onChris Lattner2005-03-021-0/+10
| | | | | | Loop Strength Reduction. llvm-svn: 20399
* Use the target triple to pick this target.Chris Lattner2004-12-121-1/+6
| | | | llvm-svn: 18830
* The LLVM bool type shall have 1 byte alignment on PPC.Chris Lattner2004-11-281-2/+2
| | | | llvm-svn: 18311
* The JIT works enoughChris Lattner2004-11-251-1/+0
| | | | llvm-svn: 18228
* Remove this method.Chris Lattner2004-11-231-5/+0
| | | | llvm-svn: 18159
* Don't return value from void function. This is only temporary anyway whileNate Begeman2004-11-231-1/+1
| | | | | | the JIT is made to work! llvm-svn: 18155
* Be really paranoid about not breaking stuff yetChris Lattner2004-11-231-0/+1
| | | | llvm-svn: 18152
* Move JITInfo from PPCTM to PPC32TMChris Lattner2004-11-231-6/+11
| | | | llvm-svn: 18140
* Remove this method, it's not clear how it could be implemented indep of 32 ↵Chris Lattner2004-11-201-6/+0
| | | | | | or 64-bit mode llvm-svn: 18038
* Disable the JIT until it can sorta kinda work.Chris Lattner2004-10-251-0/+1
| | | | llvm-svn: 17230
* bling bling!Chris Lattner2004-10-101-1/+1
| | | | llvm-svn: 16873
* All PPC instructions are now auto-printedNate Begeman2004-09-041-2/+2
| | | | | | | 32 and 64 bit AsmWriters unified Darwin and AIX specific features of AsmWriter split out llvm-svn: 16163
* Changes For Bug 352Reid Spencer2004-09-011-1/+1
| | | | | | | | Move include/Config and include/Support into include/llvm/Config, include/llvm/ADT and include/llvm/Support. From here on out, all LLVM public header files must be under include/llvm/. llvm-svn: 16137
* Do not register ppc64 yet, as it breaks the SparcV9 backendChris Lattner2004-08-201-0/+3
| | | | llvm-svn: 15955
* LR needs to be saved at 16-byte offset on a 64-bit archMisha Brukman2004-08-191-4/+4
| | | | llvm-svn: 15929
* No need for an `is64bit' flagMisha Brukman2004-08-171-14/+12
| | | | llvm-svn: 15857
* Replace PowerPCPEI.cpp with target independant PrologEpilogInserterNate Begeman2004-08-141-10/+7
| | | | llvm-svn: 15746
* Disable PPC64 backend by default because LLC cannot choose automatically betweenMisha Brukman2004-08-121-2/+2
| | | | | | | SparcV9 and PowerPC64 without target triples, since they are both 64-bit big-endian targets. llvm-svn: 15688
* * Move AIX into the llvm namespace to be accessed from RegisterInfoMisha Brukman2004-08-111-10/+14
| | | | | | | * Mark InstrInfo with 32 vs. 64 bit flag * Enable the 64-bit isel and asm printer llvm-svn: 15672
* Hyphenate ##-bit and remove first-person from comments.Misha Brukman2004-08-111-4/+4
| | | | llvm-svn: 15663
* Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm ↵Nate Begeman2004-08-111-2/+127
| | | | | | printer. llvm-svn: 15662
* Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest.Misha Brukman2004-08-111-81/+14
| | | | llvm-svn: 15636
* CodePrinter -> AsmPrinterMisha Brukman2004-08-091-1/+1
| | | | llvm-svn: 15599
* Changes commited for Nate Begeman:Chris Lattner2004-08-061-1/+4
| | | | | | | | | | | | | | | Use a PowerPC specific prolog epilog inserter to control where spilled callee save regs are placed on the stack. Get rid of implicit return address stack slot, save return address reg (LR) in appropriate slot Improve code generated for functions that don't have calls or access globals Note from Chris: PowerPCPEI will eventually be eliminated, once the functionality is merged into CodeGen/PrologEpilogInserter.cpp llvm-svn: 15536
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