| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Rename PowerPC*.h to PPC*.h | Chris Lattner | 2005-10-14 | 1 | -51/+0 |
| | | | | | llvm-svn: 23743 | ||||
| * | Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td | Chris Lattner | 2005-10-14 | 1 | -2/+2 |
| | | | | | llvm-svn: 23738 | ||||
| * | Remove the X86 and PowerPC Simple instruction selectors; their time has | Nate Begeman | 2005-08-18 | 1 | -1/+0 |
| | | | | | | | passed. llvm-svn: 22886 | ||||
| * | add prototype, remove dead proto | Chris Lattner | 2005-08-17 | 1 | -1/+1 |
| | | | | | llvm-svn: 22835 | ||||
| * | Consolidate the GPOpt stuff to all use the Subtarget, instead of still | Chris Lattner | 2005-08-05 | 1 | -1/+0 |
| | | | | | | | | | depending on the command line option. Now the command line option just sets the subtarget as appropriate. G5 opts will now default to on on G5-enabled nightly testers among other machines. llvm-svn: 22688 | ||||
| * | Use the new subtarget support to automatically choose the correct ABI | Nate Begeman | 2005-08-04 | 1 | -0/+5 |
| | | | | | | | and asm printer for PowerPC if one is not specified. llvm-svn: 22659 | ||||
| * | Support building non-PIC | Nate Begeman | 2005-07-21 | 1 | -0/+3 |
| | | | | | | | | | Remove the LoadHiAddr pseudo-instruction. Optimization of stores to and loads from statics. Force JIT to use new non-PIC codepaths. llvm-svn: 22494 | ||||
| * | Integrate SelectFPExpr into SelectExpr. This gets PPC32 closer to being | Nate Begeman | 2005-07-19 | 1 | -2/+0 |
| | | | | | | | automatically generated from a target description. llvm-svn: 22470 | ||||
| * | Remove trailing whitespace | Misha Brukman | 2005-04-21 | 1 | -2/+2 |
| | | | | | llvm-svn: 21425 | ||||
| * | Make pattern isel default for ppc | Nate Begeman | 2005-04-15 | 1 | -0/+1 |
| | | | | | | | | | | | Add new ppc beta option related to using condition registers Make pattern isel control flag (-enable-pattern-isel) global and tristate 0 == off 1 == on 2 == target default llvm-svn: 21309 | ||||
| * | Remove 64 bit simple ISel, it never worked correctly | Nate Begeman | 2005-04-05 | 1 | -1/+1 |
| | | | | | | | Add initial (buggy) implementation of 64 bit pattern ISel llvm-svn: 21096 | ||||
| * | Addition of the PPC32 Pattern ISel. While it is far from complete, it will | Nate Begeman | 2005-03-24 | 1 | -0/+1 |
| | | | | | | | | be brought up to parity with the current simple ISel in the coming days. Currently, -pattern-isel is required to trigger it. llvm-svn: 20805 | ||||
| * | Fix build on Linux/PowerPC64 using SuSE GCC (#undef PPC) | Misha Brukman | 2004-11-14 | 1 | -0/+3 |
| | | | | | llvm-svn: 17744 | ||||
| * | All PPC instructions are now auto-printed | Nate Begeman | 2004-09-04 | 1 | -2/+2 |
| | | | | | | | | 32 and 64 bit AsmWriters unified Darwin and AIX specific features of AsmWriter split out llvm-svn: 16163 | ||||
| * | Consistently name passed with 32 or 64 in their name | Misha Brukman | 2004-08-17 | 1 | -2/+2 |
| | | | | | llvm-svn: 15855 | ||||
| * | Replace PowerPCPEI.cpp with target independant PrologEpilogInserter | Nate Begeman | 2004-08-14 | 1 | -2/+1 |
| | | | | | llvm-svn: 15746 | ||||
| * | 64-bit instruction selector and AIX-specific 64-bit asm printer | Misha Brukman | 2004-08-11 | 1 | -1/+2 |
| | | | | | llvm-svn: 15669 | ||||
| * | Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm ↵ | Nate Begeman | 2004-08-11 | 1 | -0/+6 |
| | | | | | | | printer. llvm-svn: 15662 | ||||
| * | Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest. | Misha Brukman | 2004-08-11 | 1 | -7/+1 |
| | | | | | llvm-svn: 15636 | ||||
| * | CodePrinter -> AsmPrinter | Misha Brukman | 2004-08-09 | 1 | -1/+1 |
| | | | | | llvm-svn: 15599 | ||||
| * | Changes commited for Nate Begeman: | Chris Lattner | 2004-08-06 | 1 | -0/+1 |
| | | | | | | | | | | | | | | | | Use a PowerPC specific prolog epilog inserter to control where spilled callee save regs are placed on the stack. Get rid of implicit return address stack slot, save return address reg (LR) in appropriate slot Improve code generated for functions that don't have calls or access globals Note from Chris: PowerPCPEI will eventually be eliminated, once the functionality is merged into CodeGen/PrologEpilogInserter.cpp llvm-svn: 15536 | ||||
| * | Add PowerPCBranchSelector to discover which are `long' branches. | Misha Brukman | 2004-07-27 | 1 | -1/+2 |
| | | | | | | | Contributed by Nate Begeman. llvm-svn: 15280 | ||||
| * | Do IMPLICIT_DEFs on incoming args' hard regs, to avoid confusing the regalloc. | Brian Gaeke | 2004-07-16 | 1 | -0/+40 |
| | | | | | | | | | Support single-fp incoming args. Support single-fp outgoing args ('call' operands). Support double-fp return values. llvm-svn: 14880 | ||||
| * | The powerpc is now gone. However it is now just known as the Skeleton target. | Chris Lattner | 2004-07-16 | 1 | -42/+0 |
| | | | | | llvm-svn: 14877 | ||||
| * | Add comments describing how you would add prototypes for factory methods for | Brian Gaeke | 2004-02-02 | 1 | -0/+15 |
| | | | | | | | PowerPC-specific passes here. llvm-svn: 11073 | ||||
| * | Import of skeletal PowerPC backend I have had laying around for months... | Brian Gaeke | 2004-01-21 | 1 | -0/+27 |
| llvm-svn: 10937 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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