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path: root/llvm/lib/Target/PowerPC/PPCSchedule.td
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* [PowerPC] Remove unnecessary and incomplete commentaryBill Schmidt2015-03-041-412/+0
* Add the following 64-bit vector integer arithmetic instructions added in POWER8:Kit Barton2015-03-031-0/+14
* [PowerPC] Better scheduling for isel on P7/P8Hal Finkel2015-02-011-0/+2
* Add TableGen info for Power8.Will Schmidt2014-12-031-0/+1
* tlbia supportJoerg Sonnenberger2014-08-021-0/+1
* Add a scheduling model (with itinerary) for the PPC POWER7Hal Finkel2013-11-301-0/+1
* Split some PPC itinerary classesHal Finkel2013-11-301-12/+19
* Don't share functional units among the PPC itinerariesHal Finkel2013-11-281-15/+0
* Add IIC_ prefix to PPC instruction-class namesHal Finkel2013-11-271-479/+479
* Implement asm support for a few PowerPC bookIII that are needed for assemblingRoman Divacky2013-09-121-0/+8
* Add PPC Freescale e500mc and e5500 subtargets.Hal Finkel2012-08-281-0/+2
* Split several PPC instruction classes.Hal Finkel2012-08-281-39/+47
* Split out the PPC instruction class IntSimple from IntGeneral.Hal Finkel2012-06-121-19/+20
* Add instruction itinerary for the PPC64 A2 core.Hal Finkel2012-04-011-0/+1
* Split the LdStGeneral PPC itin. class into LdStLoad and LdStStore.Hal Finkel2012-04-011-31/+32
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-3/+3
* Add PPC 440 scheduler and some associated testsHal Finkel2011-10-171-0/+1
* Make processor FUs unique for given itinerary. This extends the limit of 32Anton Korobeynikov2010-04-181-3/+0
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
* Added InstrSchedClass to each of the PowerPC Instructions.Jim Laskey2005-10-191-94/+56
* Push processor descriptions to the top of target and add command line info.Jim Laskey2005-10-191-10/+36
* Checking in first round of scheduling tablegen files. Not tied in as yet.Jim Laskey2005-10-181-0/+520
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