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path: root/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
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* Remove trailing spaceFangrui Song2018-07-301-1/+1
* [PowerPC] fix trivial typos in comment, NFCHiroshi Inoue2018-06-131-7/+7
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-61/+59
* [DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen2018-05-091-2/+2
* Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant storesZaara Syeda2018-03-231-10/+10
* Revert [MachineLICM] This reverts commit rL327856Zaara Syeda2018-03-191-10/+10
* [MachineLICM] Add functions to MachineLICM to hoist invariant storesZaara Syeda2018-03-191-10/+10
* test commit: fix formatting of a commentZaara Syeda2018-03-131-3/+3
* [PowerPC] Fix for PR35688 - handle out-of-range values for r+r to r+i conversionNemanja Ivanovic2017-12-291-1/+1
* [PowerPC] fix a bug in redundant compare eliminationHiroshi Inoue2017-12-201-5/+13
* [PPC] Disable reg+reg to reg+imm transformation.Benjamin Kramer2017-12-181-1/+1
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* Fix code causing fallthrough warnings in the PPC back end.Nemanja Ivanovic2017-12-151-1/+4
* [PowerPC] Convert r+r instructions to r+i (pre and post RA)Nemanja Ivanovic2017-12-151-48/+63
* Disabling r312514 as it causes miscompiles that show up on bootstrapNemanja Ivanovic2017-12-151-1/+1
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-3/+3
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-3/+4
* [CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih2017-11-301-5/+5
* [PowerPC] Remove redundant TOC savesZaara Syeda2017-11-271-2/+71
* [PowerPC] fix up in redundant compare eliminationHiroshi Inoue2017-11-151-2/+6
* Revert "[PowerPC] Try to simplify a Swap if it feeds a Splat"Stefan Pintilie2017-10-301-47/+0
* [PowerPC] Try to simplify a Swap if it feeds a SplatStefan Pintilie2017-10-241-0/+47
* Revert "[PowerPC] Try to simplify a Swap if it feeds a Splat"Stefan Pintilie2017-10-231-47/+0
* [PowerPC] Try to simplify a Swap if it feeds a SplatStefan Pintilie2017-10-231-0/+47
* Disabling the transformation introduced in r315888Nemanja Ivanovic2017-10-201-2/+2
* [PowerPC] Eliminate sign- and zero-extensions if already sign- or zero-extendedHiroshi Inoue2017-10-161-0/+216
* Fix for PR34888.Nemanja Ivanovic2017-10-101-3/+4
* [trivial] fix format, NFCHiroshi Inoue2017-10-031-1/+1
* [PowerPC] eliminate partially redundant compare instructionHiroshi Inoue2017-09-281-14/+180
* [PowerPC Peephole] Constants into a join add, use ADDI over LI/ADD.Tony Jiang2017-09-191-0/+116
* [PowerPC] eliminate redundant compare instructionHiroshi Inoue2017-09-051-0/+299
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-10/+10
* [PowerPC] Improvements for BUILD_VECTOR Vol. 4Nemanja Ivanovic2016-12-061-9/+110
* [PPCMIPeephole] Fix splat eliminationTim Shen2016-10-121-3/+5
* [Power9] Part-word VSX integer scalar loads/stores and sign extend instructionsNemanja Ivanovic2016-10-041-0/+57
* Add optimization bisect opt-in calls for PowerPC passesAndrew Kaylor2016-04-271-0/+2
* [PowerPC] Add an MI SSA peephole pass.Bill Schmidt2015-11-101-0/+230
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