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path: root/llvm/lib/Target/PowerPC/PPCInstrInfo.td
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* Move the PPC TOC defs into the PPC64 InstrInfo file.Hal Finkel2012-09-051-3/+0
* Split several PPC instruction classes.Hal Finkel2012-08-281-33/+33
* Allow remat of LI on PPC.Hal Finkel2012-08-281-1/+1
* Eliminate redundant CR moves on PPC32.Hal Finkel2012-08-281-0/+16
* Add missing SDNPSideEffect flags.Jakob Stoklund Olesen2012-08-241-2/+4
* Remove variable_ops from call instructions in most targets.Jakob Stoklund Olesen2012-07-131-9/+9
* Add support for the PPC isel instruction.Hal Finkel2012-06-221-0/+7
* Convert the PPC backend to use the new FMA infrastructure.Hal Finkel2012-06-221-33/+16
* Add support for generating reg+reg (indexed) pre-inc loads on PPC.Hal Finkel2012-06-201-1/+39
* Add DAG-combines for aggressive FMA formation.Lang Hames2012-06-191-1/+1
* Add support for generating reg+reg preinc stores on PPC.Hal Finkel2012-06-191-6/+44
* Split out the PPC instruction class IntSimple from IntGeneral.Hal Finkel2012-06-121-22/+22
* Emit the two-operand form of the PPC mfcr instruction as mfocrf.Hal Finkel2012-06-111-1/+1
* Add the PPCCTRLoops pass: a PPC machine-code-level optimization pass to form ...Hal Finkel2012-06-081-0/+7
* Implement local-exec TLS on PowerPC.Roman Divacky2012-06-041-0/+7
* Enable prefetch generation on PPC64.Hal Finkel2012-04-011-0/+3
* Split the LdStGeneral PPC itin. class into LdStLoad and LdStStore.Hal Finkel2012-04-011-27/+27
* Fix dynamic linking on PPC64.Hal Finkel2012-03-311-0/+3
* Convert PowerPC to register mask operands.Roman Divacky2012-03-061-14/+2
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-3/+3
* make CR spill and restore 64-bit clean (no functional change), and fix some o...Hal Finkel2011-12-071-1/+1
* set mayStore and mayLoad on CR pseudosHal Finkel2011-12-071-2/+4
* add RESTORE_CR and support CR unspillsHal Finkel2011-12-061-0/+5
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-021-1/+1
* Add PPC 440 scheduler and some associated testsHal Finkel2011-10-171-1/+1
* Set CR1EQ only when lowering vararg floating arguments (not any varargRoman Divacky2011-08-301-0/+4
* Code generation for 'fence' instruction.Eli Friedman2011-07-271-0/+2
* Fix PR8828 by removing the explicit def in MovePCToLR as well as the pointlessCameron Zwarich2011-05-191-2/+1
* PowerPC atomic pseudos clobber CR0, they don't read it.Jakob Stoklund Olesen2011-04-041-1/+1
* Flag -> Glue, the ongoing sagaChris Lattner2010-12-231-20/+20
* Fix a bug I introduced in the ppc refactoring, which caused longChris Lattner2010-11-161-0/+1
* split out an encoder for memri operands, allowing a relocation to be ploppedChris Lattner2010-11-151-5/+6
* add support for encoding the lo14 forms used for a few PPC64 addressingChris Lattner2010-11-151-0/+1
* implement the start of support for lo16 and ha16, allowing us to get stuff like:Chris Lattner2010-11-151-0/+2
* change direct branches to encode with the same encoding methodChris Lattner2010-11-151-4/+8
* eliminate a now-unneeded operand printer.Chris Lattner2010-11-151-1/+0
* split call operands out to their own encoding class, simplifyingChris Lattner2010-11-151-0/+1
* add proper encoding for MTCRF instead of using a hack.Chris Lattner2010-11-151-0/+1
* add basic encoding support for immediates and registers, allowing us Chris Lattner2010-11-151-4/+1
* remove asmstrings (which can never be printed) from pseudo Chris Lattner2010-11-151-62/+35
* lower PPC::MFCRpseud when transforming to MC, avoiding callingChris Lattner2010-11-141-0/+7
* Emit COPY instead of FMR/FMSD instructions for floating point conversion onJakob Stoklund Olesen2010-07-161-11/+8
* The PPC MFCR instruction implicitly uses all 8 of the CRDale Johannesen2010-05-201-6/+9
* Set isTerminator on TRAP instructions.Dan Gohman2010-05-141-1/+1
* Don't use isBarrier for the PowerPC sync instruction. isBarrier is forDan Gohman2010-05-141-1/+0
* set SDNPVariadic on nodes throughout the rest of the targets thatChris Lattner2010-03-191-6/+10
* Merge PPC instructions FMRS and FMRD into a single FMR instruction.Jakob Stoklund Olesen2010-02-261-9/+5
* remove a bunch of dead named arguments in input patterns,Chris Lattner2010-02-231-5/+5
* Eliminate some uses of immAllOnes, just use -1, it doesChris Lattner2010-02-211-2/+2
* Don't specify CR sub-registers as implicit defs of BL instructions.Jakob Stoklund Olesen2010-01-051-6/+2
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