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* PTX: Add preliminary support for outputting debug information in the form ofJustin Holewinski2011-06-241-0/+97
| | | | | | | | | | .file and .loc directives. Ideally, we would utilize the existing support in AsmPrinter for this, but I cannot find a way to get .file and .loc directives to print without the rest of the associated DWARF sections, which ptxas cannot handle. llvm-svn: 133812
* PTX: Re-work target sm/compute selection and add some basic GPUJustin Holewinski2011-06-246-47/+121
| | | | | | targets: g80, gt200, gf100(fermi) llvm-svn: 133799
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-244-3/+11
| | | | | | | | | | | | target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
* PTX: Always use registers for return values, but use .param space for deviceJustin Holewinski2011-06-236-108/+725
| | | | | | | | | | | parameters if SM >= 2.0 - Update test cases to be more robust against register allocation changes - Bump up the number of registers to 128 per type - Include Python script to re-generate register file with any number of registers llvm-svn: 133736
* PTX: Whitespace fixes and remove commented out codeJustin Holewinski2011-06-232-36/+0
| | | | llvm-svn: 133734
* PTX: Prevent DCE from eliminating st.param calls, and unify the handling ofJustin Holewinski2011-06-235-107/+78
| | | | | | | st.param and ld.param FIXME: Test cases still need to be updated llvm-svn: 133733
* PTX: Use .param space for parameters in device functions for SM >= 2.0Justin Holewinski2011-06-236-33/+126
| | | | | FIXME: DCE is eliminating the final st.param.x calls, figure out why llvm-svn: 133732
* PTX: Fix FrameIndex mapping bugJustin Holewinski2011-06-225-15/+43
| | | | llvm-svn: 133619
* Test Commit.Dan Bailey2011-06-221-2/+2
| | | | llvm-svn: 133613
* PTX: Add signed integer comparisonsJustin Holewinski2011-06-221-0/+12
| | | | llvm-svn: 133599
* PTX: Add .address_size directive if PTX version >= 2.3Justin Holewinski2011-06-221-0/+7
| | | | | | Patch by Wei-Ren Chen llvm-svn: 133589
* PTX: Fix conversion between predicates and value typesJustin Holewinski2011-06-201-12/+18
| | | | llvm-svn: 133454
* PTX: Fix if-then-else formatting and add missing assertsJustin Holewinski2011-06-201-16/+12
| | | | llvm-svn: 133447
* PTX: Add basic register spilling codeJustin Holewinski2011-06-204-0/+135
| | | | | | | | | | | | The current implementation generates stack loads/stores, which are really just mov instructions from/to "special" registers. This may not be the most efficient implementation, compared to an approach where the stack registers are directly folded into instructions, but this is easier to implement and I have yet to see a case where ptxas is unable to see through this kind of register usage and know what is really going on. llvm-svn: 133443
* Fix a FIXME by making GlobalVariable::getInitializer() return aJay Foad2011-06-191-1/+1
| | | | | | const Constant *. llvm-svn: 133400
* Use the verbose asm flag instead of a new flag for decoding the LSDA.Bill Wendling2011-06-172-4/+2
| | | | llvm-svn: 133292
* Add an option that allows one to "decode" the LSDA.Bill Wendling2011-06-172-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LSDA is a bit difficult for the non-initiated to read. Even with comments, it's not always clear what's going on. This wraps the ASM streamer in a class that retains the LSDA and then emits a human-readable description of what's going on in it. So instead of having to make sense of: Lexception1: .byte 255 .byte 155 .byte 168 .space 1 .byte 3 .byte 26 Lset0 = Ltmp7-Leh_func_begin1 .long Lset0 Lset1 = Ltmp812-Ltmp7 .long Lset1 Lset2 = Ltmp913-Leh_func_begin1 .long Lset2 .byte 3 Lset3 = Ltmp812-Leh_func_begin1 .long Lset3 Lset4 = Leh_func_end1-Ltmp812 .long Lset4 .long 0 .byte 0 .byte 1 .byte 0 .byte 2 .byte 125 .long __ZTIi@GOTPCREL+4 .long __ZTIPKc@GOTPCREL+4 you can read this instead: ## Exception Handling Table: Lexception1 ## @LPStart Encoding: omit ## @TType Encoding: indirect pcrel sdata4 ## @TType Base: 40 bytes ## @CallSite Encoding: udata4 ## @Action Table Size: 26 bytes ## Action 1: ## A throw between Ltmp7 and Ltmp812 jumps to Ltmp913 on an exception. ## For type(s): __ZTIi@GOTPCREL+4 __ZTIPKc@GOTPCREL+4 ## Action 2: ## A throw between Ltmp812 and Leh_func_end1 does not have a landing pad. llvm-svn: 133286
* PTX: Adjust rounding modesJustin Holewinski2011-06-171-23/+38
| | | | | | | | | | | | | | | * rounding modes for fp add, mul, sub now use .rn * float -> int rounding correctly uses .rzi not .rni * 32bit fdiv for sm13 uses div.rn (instead of div.approx) * 32bit fdiv for sm10 now uses div (instead of div.approx) Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit. All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend. Patch by Dan Bailey llvm-svn: 133253
* PTX: Finish new calling convention implementationJustin Holewinski2011-06-168-123/+233
| | | | llvm-svn: 133172
* PTX: Rename register classes for readability and combine int and fp registersJustin Holewinski2011-06-167-741/+378
| | | | llvm-svn: 133171
* PTX: Fix whitespace errorsJustin Holewinski2011-06-164-25/+27
| | | | llvm-svn: 133158
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-151-59/+6
| | | | | | | | | | | | This simplifies many of the target description files since it is common for register classes to be related or contain sequences of numbered registers. I have verified that this doesn't change the files generated by TableGen for ARM and X86. It alters the allocation order of MBlaze GPR and Mips FGR32 registers, but I believe the change is benign. llvm-svn: 133105
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-301-0/+3
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* PTX: add flag to disable mad/fma selectionJustin Holewinski2011-05-184-4/+19
| | | | | | Patch by Dan Bailey llvm-svn: 131537
* PTX: add PTX 2.3 setting in PTX sub-target.Justin Holewinski2011-05-102-0/+4
| | | | | | Patch by Wei-Ren Chen llvm-svn: 131123
* Make the logic for determining function alignment more explicit. No ↵Eli Friedman2011-05-062-4/+3
| | | | | | functionality change. llvm-svn: 131012
* PTX: add PTX 2.3 language targetJustin Holewinski2011-05-063-1/+7
| | | | | | Patch by Wei-Ren Chen llvm-svn: 130980
* Simplify the handling of pcrel relocations on ELF. Now we do the right thingRafael Espindola2011-05-011-3/+2
| | | | | | | | | | for all symbol differences and can drop the old EmitPCRelSymbolValue method. This also make getExprForFDESymbol on ELF equal to the one on MachO, and it can be made non-virtual. llvm-svn: 130634
* Add all the plumbing needed for MC to expand cfi to the old tables inRafael Espindola2011-04-302-1/+2
| | | | | | | the final assembly. It is the same technique used when targeting assemblers that don't support .loc. llvm-svn: 130587
* PTX: support for select_cc and fixes for setccJustin Holewinski2011-04-282-1/+41
| | | | | | | | | | - expansion of SELECT_CC into SETCC - force SETCC result type to i1 - custom selection for handling i1 using SETCC Patch by Dan Bailey llvm-svn: 130358
* PTX: support for selectJustin Holewinski2011-04-281-0/+15
| | | | | | | | | - selection of SELP instruction - new selp.ll test Patch by Dan Bailey llvm-svn: 130357
* PTX: mov fix and rounding correction for cvtJustin Holewinski2011-04-281-18/+18
| | | | | | | | | | - fix typo in MOV - correct fp rounding on CVT - new cvt.ll test Patch by Dan Bailey llvm-svn: 130356
* PTX: support for fnegJustin Holewinski2011-04-281-0/+23
| | | | | | | | | - selection of FNEG instruction - new fneg.ll test Patch by Dan Bailey llvm-svn: 130355
* PTX: support for zext loads and trunc storesJustin Holewinski2011-04-281-1/+13
| | | | | | | | - expansion of EXTLOAD and TRUNCSTORE instructions Patch by Dan Bailey llvm-svn: 130354
* PTX: support for bitwise operations on predicatesJustin Holewinski2011-04-281-0/+8
| | | | | | | | | - selection of bitwise preds (AND, OR, XOR) - new bitwise.ll test Patch by Dan Bailey llvm-svn: 130353
* PTX: patch to AsmPrinterJustin Holewinski2011-04-281-22/+47
| | | | | | | | | - immediate value cast as long not int - handles initializer for constant array Patch by Dan Bailey llvm-svn: 130352
* Remove unused argument.Rafael Espindola2011-04-211-6/+4
| | | | llvm-svn: 129955
* PTX: Expand useable register spaceJustin Holewinski2011-04-211-6/+226
| | | | llvm-svn: 129913
* ptx: fix parameter orderingChe-Liang Chiou2011-04-211-4/+1
| | | | | | | | | This patch depends on the prior fix r129908 that changes to use std::find, rather than std::binary_search, on unordered array. Patch by Dan Bailey llvm-svn: 129909
* ptx: PTXMachineFunctionInfo no longer sort registers and so should not use ↵Che-Liang Chiou2011-04-211-2/+3
| | | | | | std::binary_search llvm-svn: 129908
* Revert r129846; it's breaking a buildbot. SeeEli Friedman2011-04-201-0/+1
| | | | | | http://google1.osuosl.org:8011/builders/llvm-x86_64-linux-checks/builds/825/steps/test.llvm.stage2/logs/st.ll llvm-svn: 129869
* PTX: Add intrinsics to list of built-in intrinsics, which allows them to beJustin Holewinski2011-04-209-24/+60
| | | | | | | | | | used by Clang. To help Clang integration, the PTX target has been split into two targets: ptx32 and ptx64, depending on the desired pointer size. - Add GCCBuiltin class to all intrinsics - Split PTX target into ptx32 and ptx64 llvm-svn: 129851
* ptx: add integer div and rem instructionChe-Liang Chiou2011-04-201-0/+2
| | | | | | Patched by Dan Bailey llvm-svn: 129848
* ptx: add floating-point comparison to setpChe-Liang Chiou2011-04-201-14/+234
| | | | | | Patched by Dan Bailey llvm-svn: 129847
* ptx: fix parameter orderingChe-Liang Chiou2011-04-201-1/+0
| | | | | | Patched by Dan Bailey llvm-svn: 129846
* ptx: support setp's 4-operand formatChe-Liang Chiou2011-04-022-35/+86
| | | | llvm-svn: 128767
* ptx: clean up branch code a bitChe-Liang Chiou2011-03-283-16/+17
| | | | llvm-svn: 128405
* PTX: Improve support for 64-bit addressingJustin Holewinski2011-03-233-21/+72
| | | | | | | | | - Fix bug in ADDRrr/ADDRri/ADDRii selection for 64-bit addresses - Add comparison selection for i64 - Add zext selection for i32 -> i64 - Add shl/shr/sha support for i64 llvm-svn: 128153
* ptx: add analyze/insert/remove branchChe-Liang Chiou2011-03-223-3/+170
| | | | llvm-svn: 128084
* PTX: Fix various codegen issuesJustin Holewinski2011-03-184-4/+33
| | | | | | | | - Emit mad instead of mad.rn for shader model 1.0 - Emit explicit mov.u32 instructions for reading global variables - (most PTX instructions cannot take global variable immediates) llvm-svn: 127895
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