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path: root/llvm/lib/Target/Mips/MipsTargetMachine.cpp
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* Provide InitializeAllTargets and InitializeNativeTarget functions in theBob Wilson2009-06-231-4/+2
| | | | | | | | C bindings. Change all the backend "Initialize" functions to have C linkage. Change the "llvm/Config/Targets.def" header to use C-style comments to avoid compile warnings. llvm-svn: 74026
* fix a circular dependency between the mips code generatorChris Lattner2009-06-161-3/+6
| | | | | | and its asmprinter. llvm-svn: 73573
* Introduce new headers whose inclusion forces linking andDouglas Gregor2009-06-161-0/+5
| | | | | | | | | initialization of all targets (InitializeAllTargets.h) or assembler printers (InitializeAllAsmPrinters.h). This is a step toward the elimination of relinked object files, so that we can build normal archives. llvm-svn: 73543
* Instead of passing in an unsigned value for the optimization level, use an enum,Bill Wendling2009-04-291-3/+3
| | | | | | | which better identifies what the optimization is doing. And is more flexible for future uses. llvm-svn: 70440
* Second attempt:Bill Wendling2009-04-291-4/+4
| | | | | | | | | | | | Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. llvm-svn: 70343
* r70270 isn't ready yet. Back this out. Sorry for the noise.Bill Wendling2009-04-281-4/+4
| | | | llvm-svn: 70275
* Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want toBill Wendling2009-04-281-4/+4
| | | | | | | | | | | use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'm not 100% sure if it's necessary to change it there... llvm-svn: 70270
* CodeGen still defaults to non-verbose asm, but llc now overrides it and ↵Evan Cheng2009-03-251-2/+2
| | | | | | default to verbose. llvm-svn: 67668
* Overhaul my earlier submission due to feedback. It's a large patch, but most ofBill Wendling2009-02-241-1/+1
| | | | | | | | | | | | them are generic changes. - Use the "fast" flag that's already being passed into the asm printers instead of shoving it into the DwarfWriter. - Instead of calling "MI->getParent()->getParent()" for every MI, set the machine function when calling "runOnMachineFunction" in the asm printers. llvm-svn: 65379
* Adds extern "C" ints to the .cpp files that use RegisterTarget, asOscar Fuentes2008-11-151-0/+8
| | | | | | | | | | | well as 2 files that use "Registrator"s. These are to be used by the MSVC builds, as the Win32 linker does not include libs that are otherwise unreferenced, even if global constructors in the lib have side-effects. Patch by Scott Graham! llvm-svn: 59378
* Fix command-line option printing to print two spaces where needed,Dan Gohman2008-10-141-2/+2
| | | | | | | | | instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. llvm-svn: 57521
* Fixed Bug 2751Bruno Cardoso Lopes2008-09-151-1/+1
| | | | | | | | | | | http://llvm.org/bugs/show_bug.cgi?id=2751 Abicall was enabled even when static code model was provided in the command line. The correct behavior is to disable abicall when static is specified. llvm-svn: 56228
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-211-1/+1
| | | | llvm-svn: 55092
* Added support for fp callee saved registers.Bruno Cardoso Lopes2008-08-061-1/+2
| | | | | | | | | | | | | | | | | | | | | Added fp register clobbering during calls. Added AsmPrinter support for "fmask", a bitmask that indicates where on the stack the fp callee saved registers are. Fixed the stack frame layout for Mips, now the callee saved regs are in the right stack location (a little documentation about how this stack frame must look like is present in MipsRegisterInfo.cpp). This was done using the method MipsRegisterInfo::adjustMipsStackFrame To be more clear, these are examples of what is solves : 1) FP and RA are also callee saved, and despite they aren't in CSI they must be saved before the fp callee saved registers. 2) The ABI requires that local varibles are allocated before the callee saved register area, the opposite behavior from the default allocation. 3) CPU and FPU saved register area must be aligned independent of each other. llvm-svn: 54403
* Fixed call stack alignment. Improved AsmPrinter alignment issues.Bruno Cardoso Lopes2008-07-151-2/+2
| | | | llvm-svn: 53585
* Added Subtarget support into RegisterInfoBruno Cardoso Lopes2008-07-141-1/+5
| | | | | | | | | | | | Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and -mno-shared). HasAbsoluteCall is not implemented but HasABICall is the default for o32 ABI. Now, both should help into a more accurate relocation types implementation. Added IsLinux is needed to choose between asm directives. Instruction name strings cleanup. AsmPrinter improved. llvm-svn: 53551
* Several changes to Mips backend, experimental fp support being the mostBruno Cardoso Lopes2008-07-051-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | important. - Cleanup in the Subtarget info with addition of new features, not all support yet, but they allow the future inclusion of features easier. Among new features, we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit integer and float registers, allegrex vector FPU (VFPU), single float only support. - TargetMachine now detects allegrex core. - Added allegrex (Mips32r2) sext_inreg instructions. - *Added Float Point Instructions*, handling single float only, and aliased accesses for 32-bit FPUs. - Some cleanup in FP instruction formats and FP register classes. - Calling conventions improved to support mips 32-bit EABI. - Added Asm Printer support for fp cond codes. - Added support for sret copy to a return register. - EABI support added into LowerCALL and FORMAL_ARGS. - MipsFunctionInfo now keeps a virtual register per function to track the sret on function entry until function ret. - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...), FP cond codes mapping and initial FP Branch Analysis. - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond, FPCmp - MipsTargetLowering : handling different FP classes, Allegrex support, sret return copy, no homing location within EABI, non 32-bit stack objects arguments, and asm constraint for float. llvm-svn: 53146
* Some Mips minor fixesBruno Cardoso Lopes2008-06-041-5/+24
| | | | | | Added support for mips little endian arch => mipsel llvm-svn: 51923
* Clean up the use of static and anonymous namespaces. This turned upDan Gohman2008-05-131-4/+2
| | | | | | | several things that were neither in an anonymous namespace nor static but not intended to be global. llvm-svn: 51017
* Use PassManagerBase instead of FunctionPassManager for functionsDan Gohman2008-03-111-3/+3
| | | | | | | | that merely add passes. This allows them to be used with either FunctionPassManager or PassManager, or even with a custom new kind of pass manager. llvm-svn: 48256
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Added support for PIC code with "explicit relocations" *only*.Bruno Cardoso Lopes2007-11-051-0/+5
| | | | | | | Removed all macro code for PIC (goodbye "la"). Support tested with shootout bench. llvm-svn: 43697
* Position Independent Code (PIC) support [2]Bruno Cardoso Lopes2007-10-091-1/+5
| | | | | | | | | | - Added a function to hold the stack location where GP must be stored during LowerCALL - AsmPrinter now emits directives based on relocation type - PIC_ set to default relocation type (same as GCC) llvm-svn: 42779
* Added method to get Mips register numbersBruno Cardoso Lopes2007-08-281-4/+5
| | | | | | | Changed the stack frame layout, StackGrowsUp fits better to Mips strange stack. Stack offset calculation bug fixed! llvm-svn: 41529
* createMipsDelaySlotFillerPass added to mips codegen runtime Bruno Cardoso Lopes2007-08-181-2/+2
| | | | llvm-svn: 41154
* Now that stack is represented the right way, LOA starts at 0Bruno Cardoso Lopes2007-07-111-6/+7
| | | | llvm-svn: 39761
* The various "getModuleMatchQuality" implementations should returnChris Lattner2007-07-091-3/+4
| | | | | | zero if they see a target triple they don't understand. llvm-svn: 38463
* Initial Mips support, here we go! =)Bruno Cardoso Lopes2007-06-061-0/+81
- Modifications from the last patch included (issues pointed by Evan Cheng are now fixed). - Added more MipsI instructions. - Added more patterns to match branch instructions. llvm-svn: 37461
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